Commit 182f0dc5 authored by Wolfram Sang's avatar Wolfram Sang Committed by Geert Uytterhoeven
Browse files

ARM: dts: renesas: r9a06g032: Describe I2C controllers 



To match the documentation and schematics, they are numbered from 1 and
not from 0.

Signed-off-by: default avatarWolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250328153134.2881-8-wsa+renesas@sang-engineering.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 969875bc

arch/arm/boot/dts/renesas/r9a06g032.dtsi

+22 −0
Original line number Diff line number Diff line
@@ -268,6 +268,28 @@ uart7: serial@50004000 { 
			status = "disabled";

		};



		i2c1: i2c@40063000 {

			compatible = "renesas,r9a06g032-i2c", "renesas,rzn1-i2c", "snps,designware-i2c";

			reg = <0x40063000 0x100>;

			interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&sysctrl R9A06G032_HCLK_I2C0>, <&sysctrl R9A06G032_CLK_I2C0>;

			clock-names = "ref", "pclk";

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		i2c2: i2c@40064000 {

			compatible = "renesas,r9a06g032-i2c", "renesas,rzn1-i2c", "snps,designware-i2c";

			reg = <0x40064000 0x100>;

			interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&sysctrl R9A06G032_HCLK_I2C1>, <&sysctrl R9A06G032_CLK_I2C1>;

			clock-names = "ref", "pclk";

			#address-cells = <1>;

			#size-cells = <0>;

			status = "disabled";

		};



		pinctrl: pinctrl@40067000 {

			compatible = "renesas,r9a06g032-pinctrl", "renesas,rzn1-pinctrl";

			reg = <0x40067000 0x1000>, <0x51000000 0x480>;