Commit 186f3edf authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'pinctrl-v6.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl 

Pull pin control updates from Linus Walleij:
 "Nothing stands out, apart from maybe the interesting Eswin EIC7700, a
  RISC-V SoC I've never seen before.

  Core changes:

   - Open code PINCTRL_FUNCTION_DESC() instead of defining a complex
     macro only used in one place

   - Add pinmux_generic_add_pinfunction() helper and use this in a few
     drivers

  New drivers:

   - Amlogic S7, S7D and S6 pin control support

   - Eswin EIC7700 pin control support

   - Qualcomm PMIV0104, PM7550 and Milos pin control support

     Because of unhelpful numbering schemes, the Qualcomm driver now
     needs to start to rely on SoC codenames

   - STM32 HDP pin control support

   - Mediatek MT8189 pin control support

  Improvements:

   - Switch remaining pin control drivers over to the new GPIO set
     callback that provides a return value

   - Support RSVD (reserved) pins in the STM32 driver

   - Move many fixed assignments over to pinctrl_desc definitions

   - Handle multiple TLMM regions in the Qualcomm driver"

* tag 'pinctrl-v6.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (105 commits)
  pinctrl: mediatek: Add pinctrl driver for mt8189
  dt-bindings: pinctrl: mediatek: Add support for mt8189
  pinctrl: aspeed-g6: Add PCIe RC PERST pin group
  pinctrl: ingenic: use pinmux_generic_add_pinfunction()
  pinctrl: keembay: use pinmux_generic_add_pinfunction()
  pinctrl: mediatek: moore: use pinmux_generic_add_pinfunction()
  pinctrl: airoha: use pinmux_generic_add_pinfunction()
  pinctrl: equilibrium: use pinmux_generic_add_pinfunction()
  pinctrl: provide pinmux_generic_add_pinfunction()
  pinctrl: pinmux: open-code PINCTRL_FUNCTION_DESC()
  pinctrl: ma35: use new GPIO line value setter callbacks
  MAINTAINERS: add Clément Le Goffic as STM32 HDP maintainer
  pinctrl: stm32: Introduce HDP driver
  dt-bindings: pinctrl: stm32: Introduce HDP
  pinctrl: qcom: Add Milos pinctrl driver
  dt-bindings: pinctrl: document the Milos Top Level Mode Multiplexer
  pinctrl: qcom: spmi: Add PM7550
  dt-bindings: pinctrl: qcom,pmic-gpio: Add PM7550 support
  pinctrl: qcom: spmi: Add PMIV0104
  dt-bindings: pinctrl: qcom,pmic-gpio: Add PMIV0104 support
  ...
parents eacf91b0 a3fe1324

Documentation/devicetree/bindings/pinctrl/amlogic,pinctrl-a4.yaml

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@@ -15,11 +15,18 @@ allOf: 
properties:

  compatible:

    oneOf:

      - const: amlogic,pinctrl-a4

      - enum:

          - amlogic,pinctrl-a4

          - amlogic,pinctrl-s6

          - amlogic,pinctrl-s7

      - items:

          - enum:

              - amlogic,pinctrl-a5

          - const: amlogic,pinctrl-a4

      - items:

          - enum:

              - amlogic,pinctrl-s7d

          - const: amlogic,pinctrl-s7



  "#address-cells":

    const: 2

Documentation/devicetree/bindings/pinctrl/eswin,eic7700-pinctrl.yaml

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/pinctrl/eswin,eic7700-pinctrl.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Eswin Eic7700 Pinctrl



maintainers:

  - Yulin Lu <luyulin@eswincomputing.com>



allOf:

  - $ref: pinctrl.yaml#



description: |

  eic7700 pin configuration nodes act as a container for an arbitrary number of

  subnodes. Each of these subnodes represents some desired configuration for one or

  more pins. This configuration can include the mux function to select on those pin(s),

  and various pin configuration parameters, such as input-enable, pull-up, etc.



properties:

  compatible:

    const: eswin,eic7700-pinctrl



  reg:

    maxItems: 1



  vrgmii-supply:

    description:

      Regulator supply for the RGMII interface IO power domain.

      This property should reference a regulator that provides either 1.8V or 3.3V,

      depending on the board-level voltage configuration required by the RGMII interface.



patternProperties:

  '-grp$':

    type: object

    additionalProperties: false



    patternProperties:

      '-pins$':

        type: object



        properties:

          pins:

            description:

              For eic7700, specifies the name(s) of one or more pins to be configured by

              this node.

            items:

              enum: [ chip_mode, mode_set0, mode_set1, mode_set2, mode_set3, xin,

                      rst_out_n, key_reset_n, gpio0, por_sel, jtag0_tck, jtag0_tms,

                      jtag0_tdi, jtag0_tdo, gpio5, spi2_cs0_n, jtag1_tck, jtag1_tms,

                      jtag1_tdi, jtag1_tdo, gpio11, spi2_cs1_n, pcie_clkreq_n,

                      pcie_wake_n, pcie_perst_n, hdmi_scl, hdmi_sda, hdmi_cec,

                      jtag2_trst, rgmii0_clk_125, rgmii0_txen, rgmii0_txclk,

                      rgmii0_txd0, rgmii0_txd1, rgmii0_txd2, rgmii0_txd3, i2s0_bclk,

                      i2s0_wclk, i2s0_sdi, i2s0_sdo, i2s_mclk, rgmii0_rxclk,

                      rgmii0_rxdv, rgmii0_rxd0, rgmii0_rxd1, rgmii0_rxd2, rgmii0_rxd3,

                      i2s2_bclk, i2s2_wclk, i2s2_sdi, i2s2_sdo, gpio27, gpio28, gpio29,

                      rgmii0_mdc, rgmii0_mdio, rgmii0_intb, rgmii1_clk_125, rgmii1_txen,

                      rgmii1_txclk, rgmii1_txd0, rgmii1_txd1, rgmii1_txd2, rgmii1_txd3,

                      i2s1_bclk, i2s1_wclk, i2s1_sdi, i2s1_sdo, gpio34, rgmii1_rxclk,

                      rgmii1_rxdv, rgmii1_rxd0, rgmii1_rxd1, rgmii1_rxd2, rgmii1_rxd3,

                      spi1_cs0_n, spi1_clk, spi1_d0, spi1_d1, spi1_d2, spi1_d3, spi1_cs1_n,

                      rgmii1_mdc, rgmii1_mdio, rgmii1_intb, usb0_pwren, usb1_pwren,

                      i2c0_scl, i2c0_sda, i2c1_scl, i2c1_sda, i2c2_scl, i2c2_sda,

                      i2c3_scl, i2c3_sda, i2c4_scl, i2c4_sda, i2c5_scl, i2c5_sda,

                      uart0_tx, uart0_rx, uart1_tx, uart1_rx, uart1_cts, uart1_rts,

                      uart2_tx, uart2_rx, jtag2_tck, jtag2_tms, jtag2_tdi, jtag2_tdo,

                      fan_pwm, fan_tach, mipi_csi0_xvs, mipi_csi0_xhs, mipi_csi0_mclk,

                      mipi_csi1_xvs, mipi_csi1_xhs, mipi_csi1_mclk, mipi_csi2_xvs,

                      mipi_csi2_xhs, mipi_csi2_mclk, mipi_csi3_xvs, mipi_csi3_xhs,

                      mipi_csi3_mclk, mipi_csi4_xvs, mipi_csi4_xhs, mipi_csi4_mclk,

                      mipi_csi5_xvs, mipi_csi5_xhs, mipi_csi5_mclk, spi3_cs_n, spi3_clk,

                      spi3_di, spi3_do, gpio92, gpio93, s_mode, gpio95, spi0_cs_n,

                      spi0_clk, spi0_d0, spi0_d1, spi0_d2, spi0_d3, i2c10_scl,

                      i2c10_sda, i2c11_scl, i2c11_sda, gpio106, boot_sel0, boot_sel1,

                      boot_sel2, boot_sel3, gpio111, lpddr_ref_clk ]



          function:

            description:

              Specify the alternative function to be configured for the

              given pins.

            enum: [ disabled, boot_sel, chip_mode, emmc, fan_tach,

                    gpio, hdmi, i2c, i2s, jtag, ddr_ref_clk_sel,

                    lpddr_ref_clk, mipi_csi, osc, pcie, pwm,

                    rgmii, reset, sata, sdio, spi, s_mode, uart, usb ]



          input-schmitt-enable: true



          input-schmitt-disable: true



          bias-disable: true



          bias-pull-down: true



          bias-pull-up: true



          input-enable: true



          input-disable: true



          drive-strength-microamp: true



        required:

          - pins



        additionalProperties: false



        allOf:

          - $ref: pincfg-node.yaml#

          - $ref: pinmux-node.yaml#



          - if:

              properties:

                pins:

                  anyOf:

                    - pattern: '^rgmii'

                    - const: lpddr_ref_clk

            then:

              properties:

                drive-strength-microamp:

                  enum: [3000, 6000, 9000, 12000, 15000, 18000, 21000, 24000]

            else:

              properties:

                drive-strength-microamp:

                  enum: [6000, 9000, 12000, 15000, 18000, 21000, 24000, 27000]



required:

  - compatible

  - reg



unevaluatedProperties: false



examples:

  - |

    pinctrl@51600080 {

      compatible = "eswin,eic7700-pinctrl";

      reg = <0x51600080 0x1fff80>;

      vrgmii-supply = <&vcc_1v8>;



      dev-active-grp {

        /* group node defining 1 standard pin */

        gpio10-pins {

          pins = "jtag1_tdo";

          function = "gpio";

          input-enable;

          bias-pull-up;

        };



        /* group node defining 2 I2C pins */

        i2c6-pins {

          pins = "uart1_cts", "uart1_rts";

          function = "i2c";

        };

      };

    };

Documentation/devicetree/bindings/pinctrl/mediatek,mt8189-pinctrl.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8189-pinctrl.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: MediaTek MT8189 Pin Controller



maintainers:

  - Lei Xue <lei.xue@mediatek.com>

  - Cathy Xu <ot_cathy.xu@mediatek.com>



description:

  The MediaTek's MT8189 Pin controller is used to control SoC pins.



properties:

  compatible:

    const: mediatek,mt8189-pinctrl



  reg:

    items:

      - description: gpio base

      - description: lm group IO

      - description: rb0 group IO

      - description: rb1 group IO

      - description: bm0 group IO

      - description: bm1 group IO

      - description: bm2 group IO

      - description: lt0 group IO

      - description: lt1 group IO

      - description: rt group IO

      - description: eint0 group IO

      - description: eint1 group IO

      - description: eint2 group IO

      - description: eint3 group IO

      - description: eint4 group IO



  reg-names:

    items:

      - const: base

      - const: lm

      - const: rb0

      - const: rb1

      - const: bm0

      - const: bm1

      - const: bm2

      - const: lt0

      - const: lt1

      - const: rt

      - const: eint0

      - const: eint1

      - const: eint2

      - const: eint3

      - const: eint4



  interrupts:

    maxItems: 1



  interrupt-controller: true



  '#interrupt-cells':

    const: 2



  gpio-controller: true



  '#gpio-cells':

    const: 2



  gpio-ranges:

    maxItems: 1



  gpio-line-names: true



# PIN CONFIGURATION NODES

patternProperties:

  '-pins$':

    type: object

    additionalProperties: false



    patternProperties:

      '^pins':

        type: object

        $ref: /schemas/pinctrl/pincfg-node.yaml

        additionalProperties: false

        description:

          A pinctrl node should contain at least one subnode representing the

          pinctrl groups available on the machine. Each subnode will list the

          pins it needs, and how they should be configured, with regard to muxer

          configuration, pullups, drive strength, input enable/disable and input

          schmitt.



        properties:

          pinmux:

            description:

              Integer array, represents gpio pin number and mux setting.

              Supported pin number and mux varies for different SoCs, and are

              defined as macros in arch/arm64/boot/dts/mediatek/mt8189-pinfunc.h

              directly, for this SoC.



          drive-strength:

            enum: [2, 4, 6, 8, 10, 12, 14, 16]



          bias-pull-down:

            oneOf:

              - type: boolean

              - enum: [100, 101, 102, 103]

                description: mt8189 pull down PUPD/R0/R1 type define value.

              - enum: [75000, 5000]

                description: mt8189 pull down RSEL type si unit value(ohm).

            description: |

              For pull down type is normal, it doesn't need add R1R0 define

              and resistance value.



              For pull down type is PUPD/R0/R1 type, it can add R1R0 define to

              set different resistance. It can support "MTK_PUPD_SET_R1R0_00" &

              "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" &

              "MTK_PUPD_SET_R1R0_11" define in mt8189.



              For pull down type is PD/RSEL, it can add resistance value(ohm)

              to set different resistance by identifying property

              "mediatek,rsel-resistance-in-si-unit".



          bias-pull-up:

            oneOf:

              - type: boolean

              - enum: [100, 101, 102, 103]

                description: mt8189 pull up PUPD/R0/R1 type define value.

              - enum: [1000, 1500, 2000, 3000, 4000, 5000, 75000]

                description: mt8189 pull up RSEL type si unit value(ohm).

            description: |

              For pull up type is normal, it don't need add R1R0 define

              and resistance value.



              For pull up type is PUPD/R0/R1 type, it can add R1R0 define to

              set different resistance. It can support "MTK_PUPD_SET_R1R0_00" &

              "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" &

              "MTK_PUPD_SET_R1R0_11" define in mt8189.



              For pull up type is PU/RSEL, it can add resistance value(ohm)

              to set different resistance by identifying property

              "mediatek,rsel-resistance-in-si-unit".



          bias-disable: true



          output-high: true



          output-low: true



          input-enable: true



          input-disable: true



          input-schmitt-enable: true



          input-schmitt-disable: true



        required:

          - pinmux



required:

  - compatible

  - reg

  - interrupts

  - interrupt-controller

  - '#interrupt-cells'

  - gpio-controller

  - '#gpio-cells'

  - gpio-ranges



additionalProperties: false



examples:

  - |

    #include <dt-bindings/pinctrl/mt65xx.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    #define PINMUX_GPIO51__FUNC_SCL0 (MTK_PIN_NO(51) | 2)

    #define PINMUX_GPIO52__FUNC_SDA0 (MTK_PIN_NO(52) | 2)



    pio: pinctrl@10005000 {

        compatible = "mediatek,mt8189-pinctrl";

        reg = <0x10005000 0x1000>,

              <0x11b50000 0x1000>,

              <0x11c50000 0x1000>,

              <0x11c60000 0x1000>,

              <0x11d20000 0x1000>,

              <0x11d30000 0x1000>,

              <0x11d40000 0x1000>,

              <0x11e20000 0x1000>,

              <0x11e30000 0x1000>,

              <0x11f20000 0x1000>,

              <0x11ce0000 0x1000>,

              <0x11de0000 0x1000>,

              <0x11e60000 0x1000>,

              <0x1c01e000 0x1000>,

              <0x11f00000 0x1000>;

        reg-names = "base", "lm", "rb0", "rb1", "bm0" , "bm1",

                    "bm2", "lt0", "lt1", "rt", "eint0", "eint1",

                    "eint2", "eint3", "eint4";

        gpio-controller;

        #gpio-cells = <2>;

        gpio-ranges = <&pio 0 0 182>;

        interrupt-controller;

        interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH 0>;

        #interrupt-cells = <2>;



        i2c0-pins {

            pins {

                pinmux = <PINMUX_GPIO51__FUNC_SCL0>,

                         <PINMUX_GPIO52__FUNC_SDA0>;

                bias-disable;

            };

        };

    };

Documentation/devicetree/bindings/pinctrl/nxp,lpc1850-scu.txt

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NXP LPC18xx/43xx SCU pin controller Device Tree Bindings

--------------------------------------------------------



Required properties:

- compatible		: Should be "nxp,lpc1850-scu"

- reg			: Address and length of the register set for the device

- clocks		: Clock specifier (see clock bindings for details)



The lpc1850-scu driver uses the generic pin multiplexing and generic pin

configuration documented in pinctrl-bindings.txt.



The following generic nodes are supported:

 - function

 - pins

 - bias-disable

 - bias-pull-up

 - bias-pull-down

 - drive-strength

 - input-enable

 - input-disable

 - input-schmitt-enable

 - input-schmitt-disable

 - slew-rate



NXP specific properties:

 - nxp,gpio-pin-interrupt : Assign pin to gpio pin interrupt controller

			    irq number 0 to 7. See example below.



Not all pins support all properties so either refer to the NXP 1850/4350

user manual or the pin table in the pinctrl-lpc18xx driver for supported

pin properties.



Example:

pinctrl: pinctrl@40086000 {

	compatible = "nxp,lpc1850-scu";

	reg = <0x40086000 0x1000>;

	clocks = <&ccu1 CLK_CPU_SCU>;



	i2c0_pins: i2c0-pins {

		i2c0_pins_cfg {

			pins = "i2c0_scl", "i2c0_sda";

			function = "i2c0";

			input-enable;

		};

	};



	uart0_pins: uart0-pins {

		uart0_rx_cfg {

			pins = "pf_11";

			function = "uart0";

			bias-disable;

			input-enable;

		};



		uart0_tx_cfg {

			pins = "pf_10";

			function = "uart0";

			bias-disable;

		};

	};



	gpio_joystick_pins: gpio-joystick-pins {

		gpio_joystick_1_cfg {

			pins =  "p9_0";

			function = "gpio";

			nxp,gpio-pin-interrupt = <0>;

			input-enable;

			bias-disable;

		};

	};

};

Documentation/devicetree/bindings/pinctrl/nxp,lpc1850-scu.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/pinctrl/nxp,lpc1850-scu.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: NXP LPC18xx/43xx SCU pin controller



description:

  Not all pins support all pin generic node properties so either refer to

  the NXP 1850/4350 user manual or the pin table in the pinctrl-lpc18xx

  driver for supported pin properties.



maintainers:

  - Frank Li <Frank.Li@nxp.com>



properties:

  compatible:

    const: nxp,lpc1850-scu



  reg:

    maxItems: 1



  clocks:

    maxItems: 1



patternProperties:

  '-pins$':

    type: object

    additionalProperties: false



    patternProperties:

      '_cfg$':

        type: object



        allOf:

          - $ref: pincfg-node.yaml#

          - $ref: pinmux-node.yaml#



        unevaluatedProperties: false



        properties:

          nxp,gpio-pin-interrupt:

            $ref: /schemas/types.yaml#/definitions/uint32

            minimum: 0

            maximum: 7

            description:

              Assign pin to gpio pin interrupt controller

              irq number 0 to 7. See example below.



required:

  - compatible

  - reg

  - clocks



allOf:

  - $ref: pinctrl.yaml#



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/clock/lpc18xx-ccu.h>



    pinctrl@40086000 {

        compatible = "nxp,lpc1850-scu";

        reg = <0x40086000 0x1000>;

        clocks = <&ccu1 CLK_CPU_SCU>;



        gpio-joystick-pins {

            gpio-joystick-1_cfg {

                pins = "p9_0";

                function = "gpio";

                nxp,gpio-pin-interrupt = <0>;

                input-enable;

                bias-disable;

            };

        };

    };