Commit 18a50f82 authored by Nitin Garg's avatar Nitin Garg Committed by Abel Vesa
Browse files

clk: imx: scu: Do not enable runtime PM for CPU clks



Since CPU clocks are managed by CPUFREQ and ATF, do not enable
runtime PM otherwise rpm gets out of status as cpufreq
also manages clock states.

Signed-off-by: default avatarNitin Garg <nitin.garg@nxp.com>
Signed-off-by: default avatarDong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: default avatarAbel Vesa <abel.vesa@nxp.com>
Signed-off-by: default avatarAbel Vesa <abel.vesa@nxp.com>
parent a82327cc
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+18 −12
Original line number Diff line number Diff line
@@ -521,6 +521,8 @@ static int imx_clk_scu_probe(struct platform_device *pdev)
	struct clk_hw *hw;
	int ret;

	if (!((clk->rsrc == IMX_SC_R_A35) || (clk->rsrc == IMX_SC_R_A53) ||
	    (clk->rsrc == IMX_SC_R_A72))) {
		pm_runtime_set_suspended(dev);
		pm_runtime_set_autosuspend_delay(dev, 50);
		pm_runtime_use_autosuspend(&pdev->dev);
@@ -532,6 +534,7 @@ static int imx_clk_scu_probe(struct platform_device *pdev)
			pm_runtime_disable(dev);
			return ret;
		}
	}

	hw = __imx_clk_scu(dev, clk->name, clk->parents, clk->num_parents,
			   clk->rsrc, clk->clk_type);
@@ -543,8 +546,11 @@ static int imx_clk_scu_probe(struct platform_device *pdev)
	clk->hw = hw;
	list_add_tail(&clk->node, &imx_scu_clks[clk->rsrc]);

	if (!((clk->rsrc == IMX_SC_R_A35) || (clk->rsrc == IMX_SC_R_A53) ||
	    (clk->rsrc == IMX_SC_R_A72))) {
		pm_runtime_mark_last_busy(&pdev->dev);
		pm_runtime_put_autosuspend(&pdev->dev);
	}

	dev_dbg(dev, "register SCU clock rsrc:%d type:%d\n", clk->rsrc,
		clk->clk_type);