Commit 18bec7f7 authored by Vinod Koul's avatar Vinod Koul Committed by Bjorn Andersson
Browse files

arm64: dts: qcom: sc7280: Add GENI I2C/SPI DMA channels



The GENI I2C and SPI controllers may use the GPI DMA engine, define the
rx and tx channels for these controllers to enable this.

Co-developed-by: default avatarVijaya Krishna Nivarthi <quic_vnivarth@quicinc.com>
Signed-off-by: default avatarVijaya Krishna Nivarthi <quic_vnivarth@quicinc.com>
Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220421115526.1828659-2-vkoul@kernel.org
parent c11e239f
Loading
Loading
Loading
Loading
+97 −0
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@
#include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/clock/qcom,videocc-sc7280.h>
#include <dt-bindings/dma/qcom-gpi.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interconnect/qcom,osm-l3.h>
#include <dt-bindings/interconnect/qcom,sc7280.h>
@@ -964,6 +965,9 @@ i2c0: i2c@980000 {
						<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
				interconnect-names = "qup-core", "qup-config",
							"qup-memory";
				dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>,
				       <&gpi_dma0 1 0 QCOM_GPI_I2C>;
				dma-names = "tx", "rx";
				status = "disabled";
			};

@@ -982,6 +986,9 @@ spi0: spi@980000 {
				interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
						<&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_QUP_0 0>;
				interconnect-names = "qup-core", "qup-config";
				dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>,
				       <&gpi_dma0 1 0 QCOM_GPI_SPI>;
				dma-names = "tx", "rx";
				status = "disabled";
			};

@@ -1016,6 +1023,9 @@ i2c1: i2c@984000 {
						<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
				interconnect-names = "qup-core", "qup-config",
							"qup-memory";
				dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
				       <&gpi_dma0 1 1 QCOM_GPI_I2C>;
				dma-names = "tx", "rx";
				status = "disabled";
			};

@@ -1034,6 +1044,9 @@ spi1: spi@984000 {
				interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
						<&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_QUP_0 0>;
				interconnect-names = "qup-core", "qup-config";
				dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
				       <&gpi_dma0 1 1 QCOM_GPI_SPI>;
				dma-names = "tx", "rx";
				status = "disabled";
			};

@@ -1068,6 +1081,9 @@ i2c2: i2c@988000 {
						<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
				interconnect-names = "qup-core", "qup-config",
							"qup-memory";
				dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>,
				       <&gpi_dma0 1 2 QCOM_GPI_I2C>;
				dma-names = "tx", "rx";
				status = "disabled";
			};

@@ -1086,6 +1102,9 @@ spi2: spi@988000 {
				interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
						<&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_QUP_0 0>;
				interconnect-names = "qup-core", "qup-config";
				dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>,
				       <&gpi_dma0 1 2 QCOM_GPI_SPI>;
				dma-names = "tx", "rx";
				status = "disabled";
			};

@@ -1120,6 +1139,9 @@ i2c3: i2c@98c000 {
						<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
				interconnect-names = "qup-core", "qup-config",
							"qup-memory";
				dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>,
				       <&gpi_dma0 1 3 QCOM_GPI_I2C>;
				dma-names = "tx", "rx";
				status = "disabled";
			};

@@ -1138,6 +1160,9 @@ spi3: spi@98c000 {
				interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
						<&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_QUP_0 0>;
				interconnect-names = "qup-core", "qup-config";
				dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>,
				       <&gpi_dma0 1 3 QCOM_GPI_SPI>;
				dma-names = "tx", "rx";
				status = "disabled";
			};

@@ -1172,6 +1197,9 @@ i2c4: i2c@990000 {
						<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
				interconnect-names = "qup-core", "qup-config",
							"qup-memory";
				dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>,
				       <&gpi_dma0 1 4 QCOM_GPI_I2C>;
				dma-names = "tx", "rx";
				status = "disabled";
			};

@@ -1190,6 +1218,9 @@ spi4: spi@990000 {
				interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
						<&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_QUP_0 0>;
				interconnect-names = "qup-core", "qup-config";
				dmas = <&gpi_dma0 0 4 QCOM_GPI_SPI>,
				       <&gpi_dma0 1 4 QCOM_GPI_SPI>;
				dma-names = "tx", "rx";
				status = "disabled";
			};

@@ -1224,6 +1255,9 @@ i2c5: i2c@994000 {
						<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
				interconnect-names = "qup-core", "qup-config",
							"qup-memory";
				dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>,
				       <&gpi_dma0 1 5 QCOM_GPI_I2C>;
				dma-names = "tx", "rx";
				status = "disabled";
			};

@@ -1242,6 +1276,9 @@ spi5: spi@994000 {
				interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
						<&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_QUP_0 0>;
				interconnect-names = "qup-core", "qup-config";
				dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>,
				       <&gpi_dma0 1 5 QCOM_GPI_SPI>;
				dma-names = "tx", "rx";
				status = "disabled";
			};

@@ -1276,6 +1313,9 @@ i2c6: i2c@998000 {
						<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
				interconnect-names = "qup-core", "qup-config",
							"qup-memory";
				dmas = <&gpi_dma0 0 6 QCOM_GPI_I2C>,
				       <&gpi_dma0 1 6 QCOM_GPI_I2C>;
				dma-names = "tx", "rx";
				status = "disabled";
			};

@@ -1294,6 +1334,9 @@ spi6: spi@998000 {
				interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
						<&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_QUP_0 0>;
				interconnect-names = "qup-core", "qup-config";
				dmas = <&gpi_dma0 0 6 QCOM_GPI_SPI>,
				       <&gpi_dma0 1 6 QCOM_GPI_SPI>;
				dma-names = "tx", "rx";
				status = "disabled";
			};

@@ -1328,6 +1371,9 @@ i2c7: i2c@99c000 {
						<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
				interconnect-names = "qup-core", "qup-config",
							"qup-memory";
				dmas = <&gpi_dma0 0 7 QCOM_GPI_I2C>,
				       <&gpi_dma0 1 7 QCOM_GPI_I2C>;
				dma-names = "tx", "rx";
				status = "disabled";
			};

@@ -1346,6 +1392,9 @@ spi7: spi@99c000 {
				interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
						<&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_QUP_0 0>;
				interconnect-names = "qup-core", "qup-config";
				dmas = <&gpi_dma0 0 7 QCOM_GPI_SPI>,
				       <&gpi_dma0 1 7 QCOM_GPI_SPI>;
				dma-names = "tx", "rx";
				status = "disabled";
			};

@@ -1415,6 +1464,9 @@ i2c8: i2c@a80000 {
						<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
				interconnect-names = "qup-core", "qup-config",
							"qup-memory";
				dmas = <&gpi_dma1 0 0 QCOM_GPI_I2C>,
				       <&gpi_dma1 1 0 QCOM_GPI_I2C>;
				dma-names = "tx", "rx";
				status = "disabled";
			};

@@ -1433,6 +1485,9 @@ spi8: spi@a80000 {
				interconnects = <&clk_virt MASTER_QUP_CORE_1 0 &clk_virt SLAVE_QUP_CORE_1 0>,
						<&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_QUP_1 0>;
				interconnect-names = "qup-core", "qup-config";
				dmas = <&gpi_dma1 0 0 QCOM_GPI_SPI>,
				       <&gpi_dma1 1 0 QCOM_GPI_SPI>;
				dma-names = "tx", "rx";
				status = "disabled";
			};

@@ -1467,6 +1522,9 @@ i2c9: i2c@a84000 {
						<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
				interconnect-names = "qup-core", "qup-config",
							"qup-memory";
				dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,
				       <&gpi_dma1 1 1 QCOM_GPI_I2C>;
				dma-names = "tx", "rx";
				status = "disabled";
			};

@@ -1485,6 +1543,9 @@ spi9: spi@a84000 {
				interconnects = <&clk_virt MASTER_QUP_CORE_1 0 &clk_virt SLAVE_QUP_CORE_1 0>,
						<&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_QUP_1 0>;
				interconnect-names = "qup-core", "qup-config";
				dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>,
				       <&gpi_dma1 1 1 QCOM_GPI_SPI>;
				dma-names = "tx", "rx";
				status = "disabled";
			};

@@ -1519,6 +1580,9 @@ i2c10: i2c@a88000 {
						<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
				interconnect-names = "qup-core", "qup-config",
							"qup-memory";
				dmas = <&gpi_dma1 0 2 QCOM_GPI_I2C>,
				       <&gpi_dma1 1 2 QCOM_GPI_I2C>;
				dma-names = "tx", "rx";
				status = "disabled";
			};

@@ -1537,6 +1601,9 @@ spi10: spi@a88000 {
				interconnects = <&clk_virt MASTER_QUP_CORE_1 0 &clk_virt SLAVE_QUP_CORE_1 0>,
						<&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_QUP_1 0>;
				interconnect-names = "qup-core", "qup-config";
				dmas = <&gpi_dma1 0 2 QCOM_GPI_SPI>,
				       <&gpi_dma1 1 2 QCOM_GPI_SPI>;
				dma-names = "tx", "rx";
				status = "disabled";
			};

@@ -1571,6 +1638,9 @@ i2c11: i2c@a8c000 {
						<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
				interconnect-names = "qup-core", "qup-config",
							"qup-memory";
				dmas = <&gpi_dma1 0 3 QCOM_GPI_I2C>,
				       <&gpi_dma1 1 3 QCOM_GPI_I2C>;
				dma-names = "tx", "rx";
				status = "disabled";
			};

@@ -1589,6 +1659,9 @@ spi11: spi@a8c000 {
				interconnects = <&clk_virt MASTER_QUP_CORE_1 0 &clk_virt SLAVE_QUP_CORE_1 0>,
						<&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_QUP_1 0>;
				interconnect-names = "qup-core", "qup-config";
				dmas = <&gpi_dma1 0 3 QCOM_GPI_SPI>,
				       <&gpi_dma1 1 3 QCOM_GPI_SPI>;
				dma-names = "tx", "rx";
				status = "disabled";
			};

@@ -1623,6 +1696,9 @@ i2c12: i2c@a90000 {
						<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
				interconnect-names = "qup-core", "qup-config",
							"qup-memory";
				dmas = <&gpi_dma1 0 4 QCOM_GPI_I2C>,
				       <&gpi_dma1 1 4 QCOM_GPI_I2C>;
				dma-names = "tx", "rx";
				status = "disabled";
			};

@@ -1641,6 +1717,9 @@ spi12: spi@a90000 {
				interconnects = <&clk_virt MASTER_QUP_CORE_1 0 &clk_virt SLAVE_QUP_CORE_1 0>,
						<&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_QUP_1 0>;
				interconnect-names = "qup-core", "qup-config";
				dmas = <&gpi_dma1 0 4 QCOM_GPI_SPI>,
				       <&gpi_dma1 1 4 QCOM_GPI_SPI>;
				dma-names = "tx", "rx";
				status = "disabled";
			};

@@ -1675,6 +1754,9 @@ i2c13: i2c@a94000 {
						<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
				interconnect-names = "qup-core", "qup-config",
							"qup-memory";
				dmas = <&gpi_dma1 0 5 QCOM_GPI_I2C>,
				       <&gpi_dma1 1 5 QCOM_GPI_I2C>;
				dma-names = "tx", "rx";
				status = "disabled";
			};

@@ -1693,6 +1775,9 @@ spi13: spi@a94000 {
				interconnects = <&clk_virt MASTER_QUP_CORE_1 0 &clk_virt SLAVE_QUP_CORE_1 0>,
						<&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_QUP_1 0>;
				interconnect-names = "qup-core", "qup-config";
				dmas = <&gpi_dma1 0 5 QCOM_GPI_SPI>,
				       <&gpi_dma1 1 5 QCOM_GPI_SPI>;
				dma-names = "tx", "rx";
				status = "disabled";
			};

@@ -1727,6 +1812,9 @@ i2c14: i2c@a98000 {
						<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
				interconnect-names = "qup-core", "qup-config",
							"qup-memory";
				dmas = <&gpi_dma1 0 6 QCOM_GPI_I2C>,
				       <&gpi_dma1 1 6 QCOM_GPI_I2C>;
				dma-names = "tx", "rx";
				status = "disabled";
			};

@@ -1745,6 +1833,9 @@ spi14: spi@a98000 {
				interconnects = <&clk_virt MASTER_QUP_CORE_1 0 &clk_virt SLAVE_QUP_CORE_1 0>,
						<&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_QUP_1 0>;
				interconnect-names = "qup-core", "qup-config";
				dmas = <&gpi_dma1 0 6 QCOM_GPI_SPI>,
				       <&gpi_dma1 1 6 QCOM_GPI_SPI>;
				dma-names = "tx", "rx";
				status = "disabled";
			};

@@ -1779,6 +1870,9 @@ i2c15: i2c@a9c000 {
						<&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>;
				interconnect-names = "qup-core", "qup-config",
							"qup-memory";
				dmas = <&gpi_dma1 0 7 QCOM_GPI_I2C>,
				       <&gpi_dma1 1 7 QCOM_GPI_I2C>;
				dma-names = "tx", "rx";
				status = "disabled";
			};

@@ -1797,6 +1891,9 @@ spi15: spi@a9c000 {
				interconnects = <&clk_virt MASTER_QUP_CORE_1 0 &clk_virt SLAVE_QUP_CORE_1 0>,
						<&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_QUP_1 0>;
				interconnect-names = "qup-core", "qup-config";
				dmas = <&gpi_dma1 0 7 QCOM_GPI_SPI>,
				       <&gpi_dma1 1 7 QCOM_GPI_SPI>;
				dma-names = "tx", "rx";
				status = "disabled";
			};