Commit 18d36fd6 authored by Himal Prasad Ghimiray's avatar Himal Prasad Ghimiray
Browse files

drm/xe/svm: Support DRM_XE_SVM_MEM_RANGE_ATTR_PAT memory attribute 



This attributes sets the pat_index for the svm used vma range, which is
utilized to ascertain the coherence.

v2 (Matthew Brost)
- Pat index sanity check

Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: default avatarMatthew Brost <matthew.brost@intel.com>
Link: https://lore.kernel.org/r/20250821173104.3030148-12-himal.prasad.ghimiray@intel.com


Signed-off-by: default avatarHimal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
parent a894c274

drivers/gpu/drm/xe/xe_vm_madvise.c

+22 −2
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ 
#include <drm/xe_drm.h>



#include "xe_bo.h"

#include "xe_pat.h"

#include "xe_pt.h"

#include "xe_svm.h"
@@ -121,7 +122,12 @@ static void madvise_pat_index(struct xe_device *xe, struct xe_vm *vm, 
			      struct xe_vma **vmas, int num_vmas,

			      struct drm_xe_madvise *op)

{

	/* Implementation pending */

	int i;



	xe_assert(vm->xe, op->type == DRM_XE_MEM_RANGE_ATTR_PAT);



	for (i = 0; i < num_vmas; i++)

		vmas[i]->attr.pat_index = op->pat_index.val;

}



typedef void (*madvise_func)(struct xe_device *xe, struct xe_vm *vm,
@@ -229,8 +235,22 @@ static bool madvise_args_are_sane(struct xe_device *xe, const struct drm_xe_madv 


		break;

	case DRM_XE_MEM_RANGE_ATTR_PAT:

		/*TODO: Add valid pat check */

	{

		u16 coh_mode = xe_pat_index_get_coh_mode(xe, args->pat_index.val);



		if (XE_IOCTL_DBG(xe, !coh_mode))

			return false;



		if (XE_WARN_ON(coh_mode > XE_COH_AT_LEAST_1WAY))

			return false;



		if (XE_IOCTL_DBG(xe, args->pat_index.pad))

			return false;



		if (XE_IOCTL_DBG(xe, args->pat_index.reserved))

			return false;

		break;

	}

	default:

		if (XE_IOCTL_DBG(xe, 1))

			return false;