Commit 18ee2b9b authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-fixes-2025-08-29' of https://gitlab.freedesktop.org/drm/kernel 

Pull drm fixes from Dave Airlie:
 "Weekly fixes, feels a bit big.

  The major piece is msm fixes, then the usual amdgpu/xe along with some
  mediatek and nouveau fixes and a tegra revert.

  gpuvm:
   - fix some typos

  xe:
   - Fix user-fence race issue
   - Couple xe_vm fixes
   - Don't trigger rebind on initial dma-buf validation
   - Fix a build issue related to basename() posix vs gnu discrepancy

  amdgpu:
   - pin buffers while vmapping
   - UserQ fixes
   - Revert CSA fix
   - SR-IOV fix

  nouveau:
   - fix linear modifier
   - remove some dead code

  msm:
   - Core/GPU:
      - fix comment doc warning in gpuvm
      - fix build with KMS disabled
      - fix pgtable setup/teardown race
      - global fault counter fix
      - various error path fixes
      - GPU devcoredump snapshot fixes
      - handle in-place VM_BIND remaps to solve turnip vm update race
      - skip re-emitting IBs for unusable VMs
      - Don't use %pK through printk
      - moved display snapshot init earlier, fixing a crash
   - DPU:
      - Fixed crash in virtual plane checking code
      - Fixed mode comparison in virtual plane checking code
   - DSI:
      - Adjusted width of resulution-related registers
      - Fixed locking issue on 14nm PLLs
   - UBWC (per Bjorn's ack)
      - Added UBWC configuration for several missing platforms (fixing
        regression)

  mediatek:
   - Add error handling for old state CRTC in atomic_disable
   - Fix DSI host and panel bridge pre-enable order
   - Fix device/node reference count leaks in mtk_drm_get_all_drm_priv
   - mtk_hdmi: Fix inverted parameters in some regmap_update_bits calls

  tegra:
   - revert dma-buf change"

* tag 'drm-fixes-2025-08-29' of https://gitlab.freedesktop.org/drm/kernel: (56 commits)
  drm/mediatek: mtk_hdmi: Fix inverted parameters in some regmap_update_bits calls
  drm/amdgpu/userq: fix error handling of invalid doorbell
  drm/amdgpu: update firmware version checks for user queue support
  drm/amd/amdgpu: disable hwmon power1_cap* for gfx 11.0.3 on vf mode
  Revert "drm/amdgpu: fix incorrect vm flags to map bo"
  drm/amdgpu/gfx12: set MQD as appriopriate for queue types
  drm/amdgpu/gfx11: set MQD as appriopriate for queue types
  drm/xe: switch to local xbasename() helper
  drm/xe: Don't trigger rebind on initial dma-buf validation
  drm/xe/vm: Clear the scratch_pt pointer on error
  drm/xe/vm: Don't pin the vm_resv during validation
  drm/xe/xe_sync: avoid race during ufence signaling
  Revert "drm/tegra: Use dma_buf from GEM object instance"
  soc: qcom: use no-UBWC config for MSM8956/76
  soc: qcom: add configuration for MSM8929
  soc: qcom: ubwc: add more missing platforms
  soc: qcom: ubwc: use no-uwbc config for MSM8917
  drm/msm/dpu: Add a null ptr check for dpu_encoder_needs_modeset
  dt-bindings: display/msm: qcom,mdp5: drop lut clock
  drm/gpuvm: fix various typos in .c and .h gpuvm file
  ...
parents d1cf752d 42d2abbf

Documentation/devicetree/bindings/display/msm/qcom,mdp5.yaml

+0 −1
Original line number Diff line number Diff line
@@ -60,7 +60,6 @@ properties: 
          - const: bus

          - const: core

          - const: vsync

          - const: lut

          - const: tbu

          - const: tbu_rt

        # MSM8996 has additional iommu clock

drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c

+2 −2
Original line number Diff line number Diff line
@@ -88,8 +88,8 @@ int amdgpu_map_static_csa(struct amdgpu_device *adev, struct amdgpu_vm *vm, 
	}



	r = amdgpu_vm_bo_map(adev, *bo_va, csa_addr, 0, size,

			     AMDGPU_VM_PAGE_READABLE | AMDGPU_VM_PAGE_WRITEABLE |

			     AMDGPU_VM_PAGE_EXECUTABLE);

			     AMDGPU_PTE_READABLE | AMDGPU_PTE_WRITEABLE |

			     AMDGPU_PTE_EXECUTABLE);



	if (r) {

		DRM_ERROR("failed to do bo_map on static CSA, err=%d\n", r);

drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c

+32 −2
Original line number Diff line number Diff line
@@ -285,6 +285,36 @@ static int amdgpu_dma_buf_begin_cpu_access(struct dma_buf *dma_buf, 
	return ret;

}



static int amdgpu_dma_buf_vmap(struct dma_buf *dma_buf, struct iosys_map *map)

{

	struct drm_gem_object *obj = dma_buf->priv;

	struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);

	int ret;



	/*

	 * Pin to keep buffer in place while it's vmap'ed. The actual

	 * domain is not that important as long as it's mapable. Using

	 * GTT and VRAM should be compatible with most use cases.

	 */

	ret = amdgpu_bo_pin(bo, AMDGPU_GEM_DOMAIN_GTT | AMDGPU_GEM_DOMAIN_VRAM);

	if (ret)

		return ret;

	ret = drm_gem_dmabuf_vmap(dma_buf, map);

	if (ret)

		amdgpu_bo_unpin(bo);



	return ret;

}



static void amdgpu_dma_buf_vunmap(struct dma_buf *dma_buf, struct iosys_map *map)

{

	struct drm_gem_object *obj = dma_buf->priv;

	struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);



	drm_gem_dmabuf_vunmap(dma_buf, map);

	amdgpu_bo_unpin(bo);

}



const struct dma_buf_ops amdgpu_dmabuf_ops = {

	.attach = amdgpu_dma_buf_attach,

	.pin = amdgpu_dma_buf_pin,
@@ -294,8 +324,8 @@ const struct dma_buf_ops amdgpu_dmabuf_ops = { 
	.release = drm_gem_dmabuf_release,

	.begin_cpu_access = amdgpu_dma_buf_begin_cpu_access,

	.mmap = drm_gem_dmabuf_mmap,

	.vmap = drm_gem_dmabuf_vmap,

	.vunmap = drm_gem_dmabuf_vunmap,

	.vmap = amdgpu_dma_buf_vmap,

	.vunmap = amdgpu_dma_buf_vunmap,

};



/**

drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c

+1 −0
Original line number Diff line number Diff line
@@ -471,6 +471,7 @@ amdgpu_userq_create(struct drm_file *filp, union drm_amdgpu_userq *args) 
	if (index == (uint64_t)-EINVAL) {

		drm_file_err(uq_mgr->file, "Failed to get doorbell for queue\n");

		kfree(queue);

		r = -EINVAL;

		goto unlock;

	}

drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c

+9 −5
Original line number Diff line number Diff line
@@ -1612,9 +1612,9 @@ static int gfx_v11_0_sw_init(struct amdgpu_ip_block *ip_block) 
	case IP_VERSION(11, 0, 2):

	case IP_VERSION(11, 0, 3):

		if (!adev->gfx.disable_uq &&

		    adev->gfx.me_fw_version  >= 2390 &&

		    adev->gfx.pfp_fw_version >= 2530 &&

		    adev->gfx.mec_fw_version >= 2600 &&

		    adev->gfx.me_fw_version  >= 2420 &&

		    adev->gfx.pfp_fw_version >= 2580 &&

		    adev->gfx.mec_fw_version >= 2650 &&

		    adev->mes.fw_version[0] >= 120) {

			adev->userq_funcs[AMDGPU_HW_IP_GFX] = &userq_mes_funcs;

			adev->userq_funcs[AMDGPU_HW_IP_COMPUTE] = &userq_mes_funcs;
@@ -4129,6 +4129,8 @@ static int gfx_v11_0_gfx_mqd_init(struct amdgpu_device *adev, void *m, 
#endif

	if (prop->tmz_queue)

		tmp = REG_SET_FIELD(tmp, CP_GFX_HQD_CNTL, TMZ_MATCH, 1);

	if (!prop->kernel_queue)

		tmp = REG_SET_FIELD(tmp, CP_GFX_HQD_CNTL, RB_NON_PRIV, 1);

	mqd->cp_gfx_hqd_cntl = tmp;



	/* set up cp_doorbell_control */
@@ -4281,8 +4283,10 @@ static int gfx_v11_0_compute_mqd_init(struct amdgpu_device *adev, void *m, 
	tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, UNORD_DISPATCH, 1);

	tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, TUNNEL_DISPATCH,

			    prop->allow_tunneling);

	if (prop->kernel_queue) {

		tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1);

		tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, KMD_QUEUE, 1);

	}

	if (prop->tmz_queue)

		tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, TMZ, 1);

	mqd->cp_hqd_pq_control = tmp;