Commit 19bfaff3 authored by Tao Zhang's avatar Tao Zhang Committed by Suzuki K Poulose
Browse files

dt-bindings: arm: qcom,coresight-tpdm: Add support for TPDM CMB MSR register 



Add property "qcom,cmb_msr_num" to support CMB MSR(mux select register)
for TPDM. It specifies the number of CMB MSR registers supported by
the TDPM.

Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: default avatarTao Zhang <quic_taozha@quicinc.com>
Signed-off-by: default avatarMao Jinlong <quic_jinlmao@quicinc.com>
Signed-off-by: default avatarSuzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/1707024641-22460-10-git-send-email-quic_taozha@quicinc.com
parent dc6ce57e

Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml

+10 −0
Original line number Diff line number Diff line
@@ -69,6 +69,15 @@ properties: 
    minimum: 0

    maximum: 32



  qcom,cmb-msrs-num:

    description:

      Specifies the number of CMB MSR(mux select register) registers supported

      by the monitor. If this property is not configured or set to 0, it means

      this TPDM doesn't support CMB MSR.

    $ref: /schemas/types.yaml#/definitions/uint32

    minimum: 0

    maximum: 32



  clocks:

    maxItems: 1
@@ -123,6 +132,7 @@ examples: 
      reg = <0x06c29000 0x1000>;



      qcom,cmb-element-bits = <64>;

      qcom,cmb-msrs-num = <32>;



      clocks = <&aoss_qmp>;

      clock-names = "apb_pclk";