Commit 19d0fc9e authored by Tim Harvey's avatar Tim Harvey Committed by Shawn Guo
Browse files

arm64: dts: imx8m*-venice: add I2C GPIO bus recovery support 



Add I2C GPIO bus recovery support by adding scl-gpios and sda-gpios for the
various I2C busses on Gateworks Venice boards.

Signed-off-by: default avatarTim Harvey <tharvey@gateworks.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 3fff5465

arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi

+22 −2
Original line number Diff line number Diff line
@@ -119,8 +119,11 @@ ethphy0: ethernet-phy@0 { 


&i2c1 {

	clock-frequency = <100000>;

	pinctrl-names = "default";

	pinctrl-names = "default", "gpio";

	pinctrl-0 = <&pinctrl_i2c1>;

	pinctrl-1 = <&pinctrl_i2c1_gpio>;

	scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	status = "okay";



	gsc: gsc@20 {
@@ -365,8 +368,11 @@ ldo4 { 


&i2c2 {

	clock-frequency = <400000>;

	pinctrl-names = "default";

	pinctrl-names = "default", "gpio";

	pinctrl-0 = <&pinctrl_i2c2>;

	pinctrl-1 = <&pinctrl_i2c2_gpio>;

	scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	status = "okay";



	eeprom@52 {
@@ -435,6 +441,13 @@ MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 
		>;

	};



	pinctrl_i2c1_gpio: i2c1gpiogrp {

		fsl,pins = <

			MX8MM_IOMUXC_I2C1_SCL_GPIO5_IO14	0x400001c3

			MX8MM_IOMUXC_I2C1_SDA_GPIO5_IO15	0x400001c3

		>;

	};



	pinctrl_i2c2: i2c2grp {

		fsl,pins = <

			MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL		0x400001c3
@@ -442,6 +455,13 @@ MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 
		>;

	};



	pinctrl_i2c2_gpio: i2c2gpiogrp {

		fsl,pins = <

			MX8MM_IOMUXC_I2C2_SCL_GPIO5_IO16	0x400001c3

			MX8MM_IOMUXC_I2C2_SDA_GPIO5_IO17	0x400001c3

		>;

	};



	pinctrl_uart2: uart2grp {

		fsl,pins = <

			MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX	0x140

arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts

+44 −4
Original line number Diff line number Diff line
@@ -326,8 +326,11 @@ &gpu_3d { 


&i2c1 {

	clock-frequency = <100000>;

	pinctrl-names = "default";

	pinctrl-names = "default", "gpio";

	pinctrl-0 = <&pinctrl_i2c1>;

	pinctrl-1 = <&pinctrl_i2c1_gpio>;

	scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	status = "okay";



	gsc: gsc@20 {
@@ -477,8 +480,11 @@ rtc@68 { 


&i2c2 {

	clock-frequency = <400000>;

	pinctrl-names = "default";

	pinctrl-names = "default", "gpio";

	pinctrl-0 = <&pinctrl_i2c2>;

	pinctrl-1 = <&pinctrl_i2c2_gpio>;

	scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	status = "okay";



	pmic@4b {
@@ -600,8 +606,11 @@ LDO6 { 


&i2c3 {

	clock-frequency = <400000>;

	pinctrl-names = "default";

	pinctrl-names = "default", "gpio";

	pinctrl-0 = <&pinctrl_i2c3>;

	pinctrl-1 = <&pinctrl_i2c3_gpio>;

	scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	status = "okay";



	leds_gpio: gpio@20 {
@@ -673,8 +682,11 @@ crypto@60 { 


&i2c4 {

	clock-frequency = <400000>;

	pinctrl-names = "default";

	pinctrl-names = "default", "gpio";

	pinctrl-0 = <&pinctrl_i2c4>;

	pinctrl-1 = <&pinctrl_i2c4_gpio>;

	scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	status = "okay";

};
@@ -852,6 +864,13 @@ MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 
		>;

	};



	pinctrl_i2c1_gpio: i2c1gpiogrp {

		fsl,pins = <

			MX8MM_IOMUXC_I2C1_SCL_GPIO5_IO14	0x400001c3

			MX8MM_IOMUXC_I2C1_SDA_GPIO5_IO15	0x400001c3

		>;

	};



	pinctrl_i2c2: i2c2grp {

		fsl,pins = <

			MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL		0x400001c3
@@ -859,6 +878,13 @@ MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 
		>;

	};



	pinctrl_i2c2_gpio: i2c2gpiogrp {

		fsl,pins = <

			MX8MM_IOMUXC_I2C2_SCL_GPIO5_IO16	0x400001c3

			MX8MM_IOMUXC_I2C2_SDA_GPIO5_IO17	0x400001c3

		>;

	};



	pinctrl_i2c3: i2c3grp {

		fsl,pins = <

			MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL		0x400001c3
@@ -866,6 +892,13 @@ MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 
		>;

	};



	pinctrl_i2c3_gpio: i2c3gpiogrp {

		fsl,pins = <

			MX8MM_IOMUXC_I2C3_SCL_GPIO5_IO18	0x400001c3

			MX8MM_IOMUXC_I2C3_SDA_GPIO5_IO19	0x400001c3

		>;

	};



	pinctrl_i2c4: i2c4grp {

		fsl,pins = <

			MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL		0x400001c3
@@ -873,6 +906,13 @@ MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 
		>;

	};



	pinctrl_i2c4_gpio: i2c4gpiogrp {

		fsl,pins = <

			MX8MM_IOMUXC_I2C4_SCL_GPIO5_IO20	0x400001c3

			MX8MM_IOMUXC_I2C4_SDA_GPIO5_IO21	0x400001c3

		>;

	};



	pinctrl_ksz: kszgrp {

		fsl,pins = <

			MX8MM_IOMUXC_SAI1_TXD6_GPIO4_IO18	0x41

arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts

+44 −4
Original line number Diff line number Diff line
@@ -298,8 +298,11 @@ &gpio5 { 


&i2c1 {

	clock-frequency = <100000>;

	pinctrl-names = "default";

	pinctrl-names = "default", "gpio";

	pinctrl-0 = <&pinctrl_i2c1>;

	pinctrl-1 = <&pinctrl_i2c1_gpio>;

	scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	status = "okay";



	gsc: gsc@20 {
@@ -566,8 +569,11 @@ rtc@68 { 


&i2c2 {

	clock-frequency = <400000>;

	pinctrl-names = "default";

	pinctrl-names = "default", "gpio";

	pinctrl-0 = <&pinctrl_i2c2>;

	pinctrl-1 = <&pinctrl_i2c2_gpio>;

	scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	status = "okay";



	accelerometer@19 {
@@ -585,16 +591,22 @@ accelerometer@19 { 
/* off-board header */

&i2c3 {

	clock-frequency = <400000>;

	pinctrl-names = "default";

	pinctrl-names = "default", "gpio";

	pinctrl-0 = <&pinctrl_i2c3>;

	pinctrl-1 = <&pinctrl_i2c3_gpio>;

	scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	status = "okay";

};



/* off-board header */

&i2c4 {

	clock-frequency = <400000>;

	pinctrl-names = "default";

	pinctrl-names = "default", "gpio";

	pinctrl-0 = <&pinctrl_i2c4>;

	pinctrl-1 = <&pinctrl_i2c4_gpio>;

	scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	status = "okay";

};
@@ -797,6 +809,13 @@ MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 
		>;

	};



	pinctrl_i2c1_gpio: i2c1gpiogrp {

		fsl,pins = <

			MX8MM_IOMUXC_I2C1_SCL_GPIO5_IO14	0x400001c3

			MX8MM_IOMUXC_I2C1_SDA_GPIO5_IO15	0x400001c3

		>;

	};



	pinctrl_i2c2: i2c2grp {

		fsl,pins = <

			MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL		0x400001c3
@@ -804,6 +823,13 @@ MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 
		>;

	};



	pinctrl_i2c2_gpio: i2c2gpiogrp {

		fsl,pins = <

			MX8MM_IOMUXC_I2C2_SCL_GPIO5_IO16	0x400001c3

			MX8MM_IOMUXC_I2C2_SDA_GPIO5_IO17	0x400001c3

		>;

	};



	pinctrl_i2c3: i2c3grp {

		fsl,pins = <

			MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL		0x400001c3
@@ -811,6 +837,13 @@ MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 
		>;

	};



	pinctrl_i2c3_gpio: i2c3gpiogrp {

		fsl,pins = <

			MX8MM_IOMUXC_I2C3_SCL_GPIO5_IO18	0x400001c3

			MX8MM_IOMUXC_I2C3_SDA_GPIO5_IO19	0x400001c3

		>;

	};



	pinctrl_i2c4: i2c4grp {

		fsl,pins = <

			MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL		0x400001c3
@@ -818,6 +851,13 @@ MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 
		>;

	};



	pinctrl_i2c4_gpio: i2c4gpiogrp {

		fsl,pins = <

			MX8MM_IOMUXC_I2C4_SCL_GPIO5_IO20	0x400001c3

			MX8MM_IOMUXC_I2C4_SDA_GPIO5_IO21	0x400001c3

		>;

	};



	pinctrl_gpio_leds: gpioledgrp {

		fsl,pins = <

			MX8MM_IOMUXC_SAI5_RXD0_GPIO3_IO21	0x19

arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts

+33 −3
Original line number Diff line number Diff line
@@ -265,8 +265,11 @@ &gpio5 { 


&i2c1 {

	clock-frequency = <100000>;

	pinctrl-names = "default";

	pinctrl-names = "default", "gpio";

	pinctrl-0 = <&pinctrl_i2c1>;

	pinctrl-1 = <&pinctrl_i2c1_gpio>;

	scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	status = "okay";



	gsc: gsc@20 {
@@ -397,8 +400,11 @@ rtc@68 { 


&i2c2 {

	clock-frequency = <400000>;

	pinctrl-names = "default";

	pinctrl-names = "default", "gpio";

	pinctrl-0 = <&pinctrl_i2c2>;

	pinctrl-1 = <&pinctrl_i2c2_gpio>;

	scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	status = "okay";



	pmic@4b {
@@ -520,8 +526,11 @@ LDO6 { 


&i2c3 {

	clock-frequency = <400000>;

	pinctrl-names = "default";

	pinctrl-names = "default", "gpio";

	pinctrl-0 = <&pinctrl_i2c3>;

	pinctrl-1 = <&pinctrl_i2c3_gpio>;

	scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	status = "okay";



	accelerometer@19 {
@@ -681,6 +690,13 @@ MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 
		>;

	};



	pinctrl_i2c1_gpio: i2c1gpiogrp {

		fsl,pins = <

			MX8MM_IOMUXC_I2C1_SCL_GPIO5_IO14	0x400001c3

			MX8MM_IOMUXC_I2C1_SDA_GPIO5_IO15	0x400001c3

		>;

	};



	pinctrl_i2c2: i2c2grp {

		fsl,pins = <

			MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL		0x400001c3
@@ -688,6 +704,13 @@ MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 
		>;

	};



	pinctrl_i2c2_gpio: i2c2gpiogrp {

		fsl,pins = <

			MX8MM_IOMUXC_I2C2_SCL_GPIO5_IO16	0x400001c3

			MX8MM_IOMUXC_I2C2_SDA_GPIO5_IO17	0x400001c3

		>;

	};



	pinctrl_i2c3: i2c3grp {

		fsl,pins = <

			MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL		0x400001c3
@@ -695,6 +718,13 @@ MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 
		>;

	};



	pinctrl_i2c3_gpio: i2c3gpiogrp {

		fsl,pins = <

			MX8MM_IOMUXC_I2C3_SCL_GPIO5_IO18	0x400001c3

			MX8MM_IOMUXC_I2C3_SDA_GPIO5_IO19	0x400001c3

		>;

	};



	pinctrl_gpio_leds: gpioledgrp {

		fsl,pins = <

			MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5	0x19

arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts

+44 −4
Original line number Diff line number Diff line
@@ -315,8 +315,11 @@ &gpio5 { 


&i2c1 {

	clock-frequency = <100000>;

	pinctrl-names = "default";

	pinctrl-names = "default", "gpio";

	pinctrl-0 = <&pinctrl_i2c1>;

	pinctrl-1 = <&pinctrl_i2c1_gpio>;

	scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	status = "okay";



	gsc: gsc@20 {
@@ -441,8 +444,11 @@ rtc@68 { 


&i2c2 {

	clock-frequency = <400000>;

	pinctrl-names = "default";

	pinctrl-names = "default", "gpio";

	pinctrl-0 = <&pinctrl_i2c2>;

	pinctrl-1 = <&pinctrl_i2c2_gpio>;

	scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	status = "okay";



	pmic@4b {
@@ -564,8 +570,11 @@ LDO6 { 


&i2c3 {

	clock-frequency = <400000>;

	pinctrl-names = "default";

	pinctrl-names = "default", "gpio";

	pinctrl-0 = <&pinctrl_i2c3>;

	pinctrl-1 = <&pinctrl_i2c3_gpio>;

	scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	status = "okay";



	accelerometer@19 {
@@ -582,8 +591,11 @@ accelerometer@19 { 


&i2c4 {

	clock-frequency = <400000>;

	pinctrl-names = "default";

	pinctrl-names = "default", "gpio";

	pinctrl-0 = <&pinctrl_i2c4>;

	pinctrl-1 = <&pinctrl_i2c4_gpio>;

	scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	status = "okay";



	gpioled: gpio@27 {
@@ -738,6 +750,13 @@ MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 
		>;

	};



	pinctrl_i2c1_gpio: i2c1gpiogrp {

		fsl,pins = <

			MX8MM_IOMUXC_I2C1_SCL_GPIO5_IO14	0x400001c3

			MX8MM_IOMUXC_I2C1_SDA_GPIO5_IO15	0x400001c3

		>;

	};



	pinctrl_i2c2: i2c2grp {

		fsl,pins = <

			MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL		0x400001c3
@@ -745,6 +764,13 @@ MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 
		>;

	};



	pinctrl_i2c2_gpio: i2c2gpiogrp {

		fsl,pins = <

			MX8MM_IOMUXC_I2C2_SCL_GPIO5_IO16	0x400001c3

			MX8MM_IOMUXC_I2C2_SDA_GPIO5_IO17	0x400001c3

		>;

	};



	pinctrl_i2c3: i2c3grp {

		fsl,pins = <

			MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL		0x400001c3
@@ -752,6 +778,13 @@ MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 
		>;

	};



	pinctrl_i2c3_gpio: i2c3gpiogrp {

		fsl,pins = <

			MX8MM_IOMUXC_I2C3_SCL_GPIO5_IO18	0x400001c3

			MX8MM_IOMUXC_I2C3_SDA_GPIO5_IO19	0x400001c3

		>;

	};



	pinctrl_i2c4: i2c4grp {

		fsl,pins = <

			MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL		0x400001c3
@@ -759,6 +792,13 @@ MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 
		>;

	};



	pinctrl_i2c4_gpio: i2c4gpiogrp {

		fsl,pins = <

			MX8MM_IOMUXC_I2C4_SCL_GPIO5_IO20	0x400001c3

			MX8MM_IOMUXC_I2C4_SDA_GPIO5_IO21	0x400001c3

		>;

	};



	pinctrl_pcie0: pciegrp {

		fsl,pins = <

			MX8MM_IOMUXC_ECSPI2_MOSI_GPIO5_IO11	0x41