Commit 19f0dc41 authored by Ankit Nautiyal's avatar Ankit Nautiyal
Browse files

drm/i915/dp: Move num_joined_pipes and related checks together 



Move the calculation of `num_joined_pipes` and other constraints that
depend on it, into a single block.
This groups all joiner-dependent logic together, preparing the code for a
future loop-based evaluation of multiple joiner configurations.

Signed-off-by: default avatarAnkit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: default avatarImre Deak <imre.deak@intel.com>
Link: https://patch.msgid.link/20260202103731.357416-3-ankit.k.nautiyal@intel.com
parent efc85c10

drivers/gpu/drm/i915/display/intel_dp.c

+16 −16
Original line number Diff line number Diff line
@@ -1472,20 +1472,9 @@ intel_dp_mode_valid(struct drm_connector *_connector, 
		target_clock = fixed_mode->clock;

	}



	num_joined_pipes = intel_dp_num_joined_pipes(intel_dp, connector,

						     mode->hdisplay, target_clock);

	max_dotclk *= num_joined_pipes;



	sink_format = intel_dp_sink_format(connector, mode);

	output_format = intel_dp_output_format(connector, sink_format);



	status = intel_pfit_mode_valid(display, mode, output_format, num_joined_pipes);

	if (status != MODE_OK)

		return status;



	if (target_clock > max_dotclk)

		return MODE_CLOCK_HIGH;



	max_link_clock = intel_dp_max_link_rate(intel_dp);

	max_lanes = intel_dp_max_lane_count(intel_dp);
@@ -1496,6 +1485,17 @@ intel_dp_mode_valid(struct drm_connector *_connector, 
					   target_clock, mode->hdisplay,

					   link_bpp_x16, 0);



	num_joined_pipes = intel_dp_num_joined_pipes(intel_dp, connector,

						     mode->hdisplay, target_clock);

	max_dotclk *= num_joined_pipes;



	if (target_clock > max_dotclk)

		return MODE_CLOCK_HIGH;



	status = intel_pfit_mode_valid(display, mode, output_format, num_joined_pipes);

	if (status != MODE_OK)

		return status;



	if (intel_dp_has_dsc(connector)) {

		int pipe_bpp;
@@ -1538,14 +1538,14 @@ intel_dp_mode_valid(struct drm_connector *_connector, 
	if (intel_dp_joiner_needs_dsc(display, num_joined_pipes) && !dsc)

		return MODE_CLOCK_HIGH;



	if (mode_rate > max_rate && !dsc)

		return MODE_CLOCK_HIGH;



	status = intel_dp_mode_valid_downstream(connector, mode, target_clock);

	status = intel_mode_valid_max_plane_size(display, mode, num_joined_pipes);

	if (status != MODE_OK)

		return status;



	return intel_mode_valid_max_plane_size(display, mode, num_joined_pipes);

	if (mode_rate > max_rate && !dsc)

		return MODE_CLOCK_HIGH;



	return intel_dp_mode_valid_downstream(connector, mode, target_clock);

}



bool intel_dp_source_supports_tps3(struct intel_display *display)