Commit 19f1016e authored by Philipp Zabel's avatar Philipp Zabel Committed by Thierry Reding
Browse files

pwm: stm32: Fix enable count for clk in .probe() 



Make the driver take over hardware state without disabling in .probe()
and enable the clock for each enabled channel.

Signed-off-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
[ukleinek: split off from a patch that also implemented .get_state()]
Signed-off-by: default avatarUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Fixes: 7edf7369 ("pwm: Add driver for STM32 plaftorm")
Reviewed-by: default avatarFabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: default avatarThierry Reding <thierry.reding@gmail.com>
parent e56ec7b7

drivers/pwm/pwm-stm32.c

+14 −4
Original line number Diff line number Diff line
@@ -605,17 +605,21 @@ static void stm32_pwm_detect_complementary(struct stm32_pwm *priv) 
	priv->have_complementary_output = (ccer != 0);

}



static unsigned int stm32_pwm_detect_channels(struct stm32_pwm *priv)

static unsigned int stm32_pwm_detect_channels(struct stm32_pwm *priv,

					      unsigned int *num_enabled)

{

	u32 ccer;

	u32 ccer, ccer_backup;



	/*

	 * If channels enable bits don't exist writing 1 will have no

	 * effect so we can detect and count them.

	 */

	regmap_read(priv->regmap, TIM_CCER, &ccer_backup);

	regmap_set_bits(priv->regmap, TIM_CCER, TIM_CCER_CCXE);

	regmap_read(priv->regmap, TIM_CCER, &ccer);

	regmap_clear_bits(priv->regmap, TIM_CCER, TIM_CCER_CCXE);

	regmap_write(priv->regmap, TIM_CCER, ccer_backup);



	*num_enabled = hweight32(ccer_backup & TIM_CCER_CCXE);



	return hweight32(ccer & TIM_CCER_CCXE);

}
@@ -626,6 +630,8 @@ static int stm32_pwm_probe(struct platform_device *pdev) 
	struct device_node *np = dev->of_node;

	struct stm32_timers *ddata = dev_get_drvdata(pdev->dev.parent);

	struct stm32_pwm *priv;

	unsigned int num_enabled;

	unsigned int i;

	int ret;



	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
@@ -648,7 +654,11 @@ static int stm32_pwm_probe(struct platform_device *pdev) 


	priv->chip.dev = dev;

	priv->chip.ops = &stm32pwm_ops;

	priv->chip.npwm = stm32_pwm_detect_channels(priv);

	priv->chip.npwm = stm32_pwm_detect_channels(priv, &num_enabled);



	/* Initialize clock refcount to number of enabled PWM channels. */

	for (i = 0; i < num_enabled; i++)

		clk_enable(priv->clk);



	ret = devm_pwmchip_add(dev, &priv->chip);

	if (ret < 0)