Unverified Commit 1a6274f0 authored by Cyan Yang's avatar Cyan Yang Committed by Palmer Dabbelt
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riscv: hwprobe: Add SiFive vendor extension support and probe for xsfqmaccdod and xsfqmaccqoq



Add a new hwprobe key "RISCV_HWPROBE_KEY_VENDOR_EXT_SIFIVE_0" which allows
userspace to probe for the new vendor extensions from SiFive. Also, add
new hwprobe for SiFive "xsfvqmaccdod" and "xsfvqmaccqoq" vendor
extensions.

Signed-off-by: default avatarCyan Yang <cyan.yang@sifive.com>
Link: https://lore.kernel.org/r/20250418053239.4351-5-cyan.yang@sifive.com


Signed-off-by: default avatarPalmer Dabbelt <palmer@rivosinc.com>
parent e8fd215e
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+1 −0
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@@ -22,6 +22,7 @@ static inline bool hwprobe_key_is_bitmask(__s64 key)
	case RISCV_HWPROBE_KEY_IMA_EXT_0:
	case RISCV_HWPROBE_KEY_CPUPERF_0:
	case RISCV_HWPROBE_KEY_VENDOR_EXT_THEAD_0:
	case RISCV_HWPROBE_KEY_VENDOR_EXT_SIFIVE_0:
		return true;
	}

+19 −0
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/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_RISCV_VENDOR_EXTENSIONS_SIFIVE_HWPROBE_H
#define _ASM_RISCV_VENDOR_EXTENSIONS_SIFIVE_HWPROBE_H

#include <linux/cpumask.h>

#include <uapi/asm/hwprobe.h>

#ifdef CONFIG_RISCV_ISA_VENDOR_EXT_SIFIVE
void hwprobe_isa_vendor_ext_sifive_0(struct riscv_hwprobe *pair, const struct cpumask *cpus);
#else
static inline void hwprobe_isa_vendor_ext_sifive_0(struct riscv_hwprobe *pair,
						   const struct cpumask *cpus)
{
	pair->value = 0;
}
#endif

#endif
+4 −0
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/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */

#define	RISCV_HWPROBE_VENDOR_EXT_XSFVQMACCDOD		(1 << 0)
#define	RISCV_HWPROBE_VENDOR_EXT_XSFVQMACCQOQ		(1 << 1)
+5 −0
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@@ -15,6 +15,7 @@
#include <asm/uaccess.h>
#include <asm/unistd.h>
#include <asm/vector.h>
#include <asm/vendor_extensions/sifive_hwprobe.h>
#include <asm/vendor_extensions/thead_hwprobe.h>
#include <vdso/vsyscall.h>

@@ -300,6 +301,10 @@ static void hwprobe_one_pair(struct riscv_hwprobe *pair,
		pair->value = riscv_timebase;
		break;

	case RISCV_HWPROBE_KEY_VENDOR_EXT_SIFIVE_0:
		hwprobe_isa_vendor_ext_sifive_0(pair, cpus);
		break;

	case RISCV_HWPROBE_KEY_VENDOR_EXT_THEAD_0:
		hwprobe_isa_vendor_ext_thead_0(pair, cpus);
		break;
+1 −0
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@@ -2,5 +2,6 @@

obj-$(CONFIG_RISCV_ISA_VENDOR_EXT_ANDES)	+= andes.o
obj-$(CONFIG_RISCV_ISA_VENDOR_EXT_SIFIVE)	+= sifive.o
obj-$(CONFIG_RISCV_ISA_VENDOR_EXT_SIFIVE)	+= sifive_hwprobe.o
obj-$(CONFIG_RISCV_ISA_VENDOR_EXT_THEAD)	+= thead.o
obj-$(CONFIG_RISCV_ISA_VENDOR_EXT_THEAD)	+= thead_hwprobe.o
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