Commit 1a6a8b00 authored by Konrad Dybcio's avatar Konrad Dybcio Committed by Viresh Kumar
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cpufreq: qcom-hw: Fix reading "reg" with address/size-cells != 2



Commit 054a3ef6 ("cpufreq: qcom-hw: Allocate qcom_cpufreq_data during
probe") assumed that every reg variable is 4*u32 wide (as most new qcom
SoCs set #address- and #size-cells to <2>. That is not the case for all of
them though. Check the cells values dynamically to ensure the proper
region of the DTB is being read.

Fixes: 054a3ef6 ("cpufreq: qcom-hw: Allocate qcom_cpufreq_data during probe")
Signed-off-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
parent f5f94b9c
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+20 −2
Original line number Diff line number Diff line
@@ -649,9 +649,10 @@ static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev)
{
	struct clk_hw_onecell_data *clk_data;
	struct device *dev = &pdev->dev;
	struct device_node *soc_node;
	struct device *cpu_dev;
	struct clk *clk;
	int ret, i, num_domains;
	int ret, i, num_domains, reg_sz;

	clk = clk_get(dev, "xo");
	if (IS_ERR(clk))
@@ -679,7 +680,21 @@ static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev)
		return ret;

	/* Allocate qcom_cpufreq_data based on the available frequency domains in DT */
	num_domains = of_property_count_elems_of_size(dev->of_node, "reg", sizeof(u32) * 4);
	soc_node = of_get_parent(dev->of_node);
	if (!soc_node)
		return -EINVAL;

	ret = of_property_read_u32(soc_node, "#address-cells", &reg_sz);
	if (ret)
		goto of_exit;

	ret = of_property_read_u32(soc_node, "#size-cells", &i);
	if (ret)
		goto of_exit;

	reg_sz += i;

	num_domains = of_property_count_elems_of_size(dev->of_node, "reg", sizeof(u32) * reg_sz);
	if (num_domains <= 0)
		return num_domains;

@@ -743,6 +758,9 @@ static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev)
	else
		dev_dbg(dev, "QCOM CPUFreq HW driver initialized\n");

of_exit:
	of_node_put(soc_node);

	return ret;
}