Commit 1a930485 authored by Alexei Lazar's avatar Alexei Lazar Committed by Jakub Kicinski
Browse files

net/mlx5: XDP, Enable TX side XDP multi-buffer support 



In XDP scenarios, fragmented packets can occur if the MTU is larger
than the page size, even when the packet size fits within the linear
part.
If XDP multi-buffer support is disabled, the fragmented part won't be
handled in the TX flow, leading to packet drops.

Since XDP multi-buffer support is always available, this commit removes
the conditional check for enabling it.
This ensures that XDP multi-buffer support is always enabled,
regardless of the `is_xdp_mb` parameter, and guarantees the handling of
fragmented packets in such scenarios.

Signed-off-by: default avatarAlexei Lazar <alazar@nvidia.com>
Signed-off-by: default avatarTariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20250209101716.112774-16-tariqt@nvidia.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 95b9606b

drivers/net/ethernet/mellanox/mlx5/core/en.h

+0 −1
Original line number Diff line number Diff line
@@ -384,7 +384,6 @@ enum { 
	MLX5E_SQ_STATE_VLAN_NEED_L2_INLINE,

	MLX5E_SQ_STATE_PENDING_XSK_TX,

	MLX5E_SQ_STATE_PENDING_TLS_RX_RESYNC,

	MLX5E_SQ_STATE_XDP_MULTIBUF,

	MLX5E_NUM_SQ_STATES, /* Must be kept last */

};

drivers/net/ethernet/mellanox/mlx5/core/en/params.c

+0 −1
Original line number Diff line number Diff line
@@ -1247,7 +1247,6 @@ void mlx5e_build_xdpsq_param(struct mlx5_core_dev *mdev, 
	mlx5e_build_sq_param_common(mdev, param);

	MLX5_SET(wq, wq, log_wq_sz, params->log_sq_size);

	param->is_mpw = MLX5E_GET_PFLAG(params, MLX5E_PFLAG_XDP_TX_MPWQE);

	param->is_xdp_mb = !mlx5e_rx_is_linear_skb(mdev, params, xsk);

	mlx5e_build_tx_cq_param(mdev, params, &param->cqp);

}

drivers/net/ethernet/mellanox/mlx5/core/en/params.h

+0 −1
Original line number Diff line number Diff line
@@ -33,7 +33,6 @@ struct mlx5e_sq_param { 
	struct mlx5_wq_param       wq;

	bool                       is_mpw;

	bool                       is_tls;

	bool                       is_xdp_mb;

	u16                        stop_room;

};

drivers/net/ethernet/mellanox/mlx5/core/en/reporter_tx.c

+0 −1
Original line number Diff line number Diff line
@@ -16,7 +16,6 @@ static const char * const sq_sw_state_type_name[] = { 
	[MLX5E_SQ_STATE_VLAN_NEED_L2_INLINE] = "vlan_need_l2_inline",

	[MLX5E_SQ_STATE_PENDING_XSK_TX] = "pending_xsk_tx",

	[MLX5E_SQ_STATE_PENDING_TLS_RX_RESYNC] = "pending_tls_rx_resync",

	[MLX5E_SQ_STATE_XDP_MULTIBUF] = "xdp_multibuf",

};



static int mlx5e_wait_for_sq_flush(struct mlx5e_txqsq *sq)

drivers/net/ethernet/mellanox/mlx5/core/en/xdp.c

+21 −28
Original line number Diff line number Diff line
@@ -546,6 +546,7 @@ mlx5e_xmit_xdp_frame(struct mlx5e_xdpsq *sq, struct mlx5e_xmit_data *xdptxd, 
	bool inline_ok;

	bool linear;

	u16 pi;

	int i;



	struct mlx5e_xdpsq_stats *stats = sq->stats;
@@ -612,9 +613,6 @@ mlx5e_xmit_xdp_frame(struct mlx5e_xdpsq *sq, struct mlx5e_xmit_data *xdptxd, 


	cseg->opmod_idx_opcode = cpu_to_be32((sq->pc << 8) | MLX5_OPCODE_SEND);



	if (test_bit(MLX5E_SQ_STATE_XDP_MULTIBUF, &sq->state)) {

		int i;



	memset(&cseg->trailer, 0, sizeof(cseg->trailer));

	memset(eseg, 0, sizeof(*eseg) - sizeof(eseg->trailer));
@@ -642,11 +640,6 @@ mlx5e_xmit_xdp_frame(struct mlx5e_xdpsq *sq, struct mlx5e_xmit_data *xdptxd, 
	};



	sq->pc += num_wqebbs;

	} else {

		cseg->fm_ce_se = 0;



		sq->pc++;

	}



	xsk_tx_metadata_request(meta, &mlx5e_xsk_tx_metadata_ops, eseg);