Commit 1aa4524c authored by Sven Schnelle's avatar Sven Schnelle Committed by Helge Deller
Browse files

parisc: entry.S: fix space adjustment on interruption for 64-bit userspace 



In wide mode, the IASQ contain the upper part of the GVA
during interruption. This needs to be reversed before
the space is used - otherwise it contains parts of IAOQ.
See Page 2-13 "Processing Resources / Interruption Instruction
Address Queues" in the Parisc 2.0 Architecture Manual page 2-13
for an explanation.

The IAOQ/IASQ space_adjust was skipped for other interruptions
than itlb misses. However, the code in handle_interruption()
checks whether iasq[0] contains a valid space. Due to the not
masked out bits this match failed and the process was killed.

Also add space_adjust for IAOQ1/IASQ1 so ptregs contains sane values.

Signed-off-by: default avatarSven Schnelle <svens@stackframe.org>
Cc: stable@vger.kernel.org # v6.0+
Signed-off-by: default avatarHelge Deller <deller@gmx.de>
parent 5fb1d3ce

arch/parisc/kernel/entry.S

+8 −3
Original line number Diff line number Diff line
@@ -1059,8 +1059,6 @@ ENTRY_CFI(intr_save) /* for os_hpmc */ 
	STREG           %r17, PT_IOR(%r29)



#if defined(CONFIG_64BIT)

	b,n		intr_save2



skip_save_ior:

	/* We have a itlb miss, and when executing code above 4 Gb on ILP64, we

	 * need to adjust iasq/iaoq here in the same way we adjusted isr/ior
@@ -1069,10 +1067,17 @@ skip_save_ior: 
	bb,COND(>=),n	%r8,PSW_W_BIT,intr_save2

	LDREG		PT_IASQ0(%r29), %r16

	LDREG		PT_IAOQ0(%r29), %r17

	/* adjust iasq/iaoq */

	/* adjust iasq0/iaoq0 */

	space_adjust	%r16,%r17,%r1

	STREG           %r16, PT_IASQ0(%r29)

	STREG           %r17, PT_IAOQ0(%r29)



	LDREG		PT_IASQ1(%r29), %r16

	LDREG		PT_IAOQ1(%r29), %r17

	/* adjust iasq1/iaoq1 */

	space_adjust	%r16,%r17,%r1

	STREG           %r16, PT_IASQ1(%r29)

	STREG           %r17, PT_IAOQ1(%r29)

#else

skip_save_ior:

#endif