Commit 1aaea531 authored by Matt Roper's avatar Matt Roper
Browse files

drm/xe: Consolidate workaround entries for Wa_16018712365 



Wa_16018712365 applies to all graphics versions from 20.01 through 20.04
(inclusive).  Consolidate the two RTP entries into a single range-based
entry.

Reviewed-by: default avatarBalasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Link: https://patch.msgid.link/20260220-forupstream-wa_cleanup-v2-9-b12005a05af6@intel.com


Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
parent ef32868d

drivers/gpu/drm/xe/xe_wa.c

+5 −9
Original line number Diff line number Diff line
@@ -348,6 +348,11 @@ static const struct xe_rtp_entry_sr engine_was[] = { 
		       FUNC(xe_rtp_match_first_render_or_compute)),

	  XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0, SEQUENTIAL_ACCESS_UPGRADE_DISABLE))

	},

	{ XE_RTP_NAME("16018712365"),

	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2004),

		       FUNC(xe_rtp_match_first_render_or_compute)),

	  XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0_UDW, XE2_ALLOC_DPA_STARVE_FIX_DIS))

	},



	/* TGL */
@@ -485,10 +490,6 @@ static const struct xe_rtp_entry_sr engine_was[] = { 


	/* Xe2_LPG */



	{ XE_RTP_NAME("16018712365"),

	  XE_RTP_RULES(GRAPHICS_VERSION(2004), FUNC(xe_rtp_match_first_render_or_compute)),

	  XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0_UDW, XE2_ALLOC_DPA_STARVE_FIX_DIS))

	},

	{ XE_RTP_NAME("14020338487"),

	  XE_RTP_RULES(GRAPHICS_VERSION(2004), FUNC(xe_rtp_match_first_render_or_compute)),

	  XE_RTP_ACTIONS(SET(ROW_CHICKEN3, XE2_EUPEND_CHK_FLUSH_DIS))
@@ -538,11 +539,6 @@ static const struct xe_rtp_entry_sr engine_was[] = { 


	/* Xe2_HPG */



	{ XE_RTP_NAME("16018712365"),

	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2002),

		       FUNC(xe_rtp_match_first_render_or_compute)),

	  XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0_UDW, XE2_ALLOC_DPA_STARVE_FIX_DIS))

	},

	{ XE_RTP_NAME("16018737384"),

	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2999),

		       FUNC(xe_rtp_match_first_render_or_compute)),