Commit 1b57d5bc authored by Nick Chan's avatar Nick Chan Committed by Sven Peter
Browse files

arm64: dts: apple: t7001: Add cpufreq nodes 



Add the cpufreq nodes for Apple A8X SoC.

Signed-off-by: default avatarNick Chan <towinchenmi@gmail.com>
Reviewed-by: default avatarNeal Gompa <neal@gompa.dev>
Signed-off-by: default avatarSven Peter <sven@svenpeter.dev>
parent e9732399

arch/arm64/boot/dts/apple/t7001.dtsi

+52 −0
Original line number Diff line number Diff line
@@ -35,6 +35,8 @@ cpu0: cpu@0 { 
			compatible = "apple,typhoon";

			reg = <0x0 0x0>;

			cpu-release-addr = <0 0>; /* To be filled in by loader */

			performance-domains = <&cpufreq>;

			operating-points-v2 = <&typhoon_opp>;

			enable-method = "spin-table";

			device_type = "cpu";

		};
@@ -43,6 +45,8 @@ cpu1: cpu@1 { 
			compatible = "apple,typhoon";

			reg = <0x0 0x1>;

			cpu-release-addr = <0 0>; /* To be filled in by loader */

			performance-domains = <&cpufreq>;

			operating-points-v2 = <&typhoon_opp>;

			enable-method = "spin-table";

			device_type = "cpu";

		};
@@ -51,11 +55,53 @@ cpu2: cpu@2 { 
			compatible = "apple,typhoon";

			reg = <0x0 0x2>;

			cpu-release-addr = <0 0>; /* To be filled by loader */

			performance-domains = <&cpufreq>;

			operating-points-v2 = <&typhoon_opp>;

			enable-method = "spin-table";

			device_type = "cpu";

		};

	};



	typhoon_opp: opp-table {

		compatible = "operating-points-v2";



		opp01 {

			opp-hz = /bits/ 64 <300000000>;

			opp-level = <1>;

			clock-latency-ns = <300>;

		};

		opp02 {

			opp-hz = /bits/ 64 <396000000>;

			opp-level = <2>;

			clock-latency-ns = <49000>;

		};

		opp03 {

			opp-hz = /bits/ 64 <600000000>;

			opp-level = <3>;

			clock-latency-ns = <31000>;

		};

		opp04 {

			opp-hz = /bits/ 64 <840000000>;

			opp-level = <4>;

			clock-latency-ns = <32000>;

		};

		opp05 {

			opp-hz = /bits/ 64 <1128000000>;

			opp-level = <5>;

			clock-latency-ns = <32000>;

		};

		opp06 {

			opp-hz = /bits/ 64 <1392000000>;

			opp-level = <6>;

			clock-latency-ns = <37000>;

		};

		opp07 {

			opp-hz = /bits/ 64 <1512000000>;

			opp-level = <7>;

			clock-latency-ns = <41000>;

		};

	};



	soc {

		compatible = "simple-bus";

		#address-cells = <2>;
@@ -63,6 +109,12 @@ soc { 
		nonposted-mmio;

		ranges;



		cpufreq: performance-controller@202220000 {

			compatible = "apple,t7000-cluster-cpufreq", "apple,s5l8960x-cluster-cpufreq";

			reg = <0x2 0x02220000 0 0x1000>;

			#performance-domain-cells = <0>;

		};



		serial0: serial@20a0c0000 {

			compatible = "apple,s5l-uart";

			reg = <0x2 0x0a0c0000 0x0 0x4000>;