Commit 1b8af655 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull powerpc fixes from Michael Ellerman:

 - Fix corruption of f0/vs0 during FP/Vector save, seen as userspace
   crashes when using io-uring workers (in particular with MariaDB)

 - Fix KVM_RUN potentially clobbering all host userspace FP/Vector
   registers

Thanks to Timothy Pearson, Jens Axboe, and Nicholas Piggin.

* tag 'powerpc-6.7-3' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
  KVM: PPC: Book3S HV: Fix KVM_RUN clobbering FP/VEC user registers
  powerpc: Don't clobber f0/vs0 during fp|altivec register save
parents 17b17be2 dc158d23
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+13 −0
Original line number Diff line number Diff line
@@ -23,6 +23,15 @@
#include <asm/feature-fixups.h>

#ifdef CONFIG_VSX
#define __REST_1FPVSR(n,c,base)						\
BEGIN_FTR_SECTION							\
	b	2f;							\
END_FTR_SECTION_IFSET(CPU_FTR_VSX);					\
	REST_FPR(n,base);						\
	b	3f;							\
2:	REST_VSR(n,c,base);						\
3:

#define __REST_32FPVSRS(n,c,base)					\
BEGIN_FTR_SECTION							\
	b	2f;							\
@@ -41,9 +50,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX); \
2:	SAVE_32VSRS(n,c,base);						\
3:
#else
#define __REST_1FPVSR(n,b,base)		REST_FPR(n, base)
#define __REST_32FPVSRS(n,b,base)	REST_32FPRS(n, base)
#define __SAVE_32FPVSRS(n,b,base)	SAVE_32FPRS(n, base)
#endif
#define REST_1FPVSR(n,c,base)   __REST_1FPVSR(n,__REG_##c,__REG_##base)
#define REST_32FPVSRS(n,c,base) __REST_32FPVSRS(n,__REG_##c,__REG_##base)
#define SAVE_32FPVSRS(n,c,base) __SAVE_32FPVSRS(n,__REG_##c,__REG_##base)

@@ -67,6 +78,7 @@ _GLOBAL(store_fp_state)
	SAVE_32FPVSRS(0, R4, R3)
	mffs	fr0
	stfd	fr0,FPSTATE_FPSCR(r3)
	REST_1FPVSR(0, R4, R3)
	blr
EXPORT_SYMBOL(store_fp_state)

@@ -138,4 +150,5 @@ _GLOBAL(save_fpu)
2:	SAVE_32FPVSRS(0, R4, R6)
	mffs	fr0
	stfd	fr0,FPSTATE_FPSCR(r6)
	REST_1FPVSR(0, R4, R6)
	blr
+3 −3
Original line number Diff line number Diff line
@@ -1198,11 +1198,11 @@ void kvmppc_save_user_regs(void)

	usermsr = current->thread.regs->msr;

	/* Caller has enabled FP/VEC/VSX/TM in MSR */
	if (usermsr & MSR_FP)
		save_fpu(current);

		__giveup_fpu(current);
	if (usermsr & MSR_VEC)
		save_altivec(current);
		__giveup_altivec(current);

#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
	if (usermsr & MSR_TM) {
+2 −0
Original line number Diff line number Diff line
@@ -33,6 +33,7 @@ _GLOBAL(store_vr_state)
	mfvscr	v0
	li	r4, VRSTATE_VSCR
	stvx	v0, r4, r3
	lvx	v0, 0, r3
	blr
EXPORT_SYMBOL(store_vr_state)

@@ -109,6 +110,7 @@ _GLOBAL(save_altivec)
	mfvscr	v0
	li	r4,VRSTATE_VSCR
	stvx	v0,r4,r7
	lvx	v0,0,r7
	blr

#ifdef CONFIG_VSX