Commit 1c004609 authored by Huacai Chen's avatar Huacai Chen
Browse files

LoongArch: Consolidate CPU names in /proc/cpuinfo 



Some processors have no IOCSR.VENDOR and IOCSR.CPUNAME, some processors
have these registers but there is no valid information.

Consolidate CPU names in /proc/cpuinfo:
1. Add "PRID" to display the PRID & Core-Name;
2. Let "Model Name" display "Unknown" if no valid name.

Signed-off-by: default avatarHuacai Chen <chenhuacai@loongson.cn>
parent 20d7338f

arch/loongarch/include/asm/cpu.h

+21 −0
Original line number Diff line number Diff line
@@ -55,6 +55,27 @@ enum cpu_type_enum { 
	CPU_LAST

};



static inline char *id_to_core_name(unsigned int id)

{

	if ((id & PRID_COMP_MASK) != PRID_COMP_LOONGSON)

		return "Unknown";



	switch (id & PRID_SERIES_MASK) {

	case PRID_SERIES_LA132:

		return "LA132";

	case PRID_SERIES_LA264:

		return "LA264";

	case PRID_SERIES_LA364:

		return "LA364";

	case PRID_SERIES_LA464:

		return "LA464";

	case PRID_SERIES_LA664:

		return "LA664";

	default:

		return "Unknown";

	}

}



#endif /* !__ASSEMBLER__ */



/*

arch/loongarch/kernel/cpu-probe.c

+11 −23
Original line number Diff line number Diff line
@@ -277,7 +277,7 @@ static inline void cpu_probe_loongson(struct cpuinfo_loongarch *c, unsigned int 
	uint32_t config;

	uint64_t *vendor = (void *)(&cpu_full_name[VENDOR_OFFSET]);

	uint64_t *cpuname = (void *)(&cpu_full_name[CPUNAME_OFFSET]);

	const char *core_name = "Unknown";

	const char *core_name = id_to_core_name(c->processor_id);



	switch (BIT(fls(c->isa_level) - 1)) {

	case LOONGARCH_CPU_ISA_LA32R:
@@ -291,35 +291,23 @@ static inline void cpu_probe_loongson(struct cpuinfo_loongarch *c, unsigned int 
		break;

	}



	switch (c->processor_id & PRID_SERIES_MASK) {

	case PRID_SERIES_LA132:

		core_name = "LA132";

		break;

	case PRID_SERIES_LA264:

		core_name = "LA264";

		break;

	case PRID_SERIES_LA364:

		core_name = "LA364";

		break;

	case PRID_SERIES_LA464:

		core_name = "LA464";

		break;

	case PRID_SERIES_LA664:

		core_name = "LA664";

		break;

	}



	pr_info("%s Processor probed (%s Core)\n", __cpu_family[cpu], core_name);



	if (!cpu_has_iocsr)

	if (!cpu_has_iocsr) {

		__cpu_full_name[cpu] = "Unknown";

		return;



	if (!__cpu_full_name[cpu])

		__cpu_full_name[cpu] = cpu_full_name;

	}



	*vendor = iocsr_read64(LOONGARCH_IOCSR_VENDOR);

	*cpuname = iocsr_read64(LOONGARCH_IOCSR_CPUNAME);



	if (!__cpu_full_name[cpu]) {

		if (((char *)vendor)[0] == 0)

			__cpu_full_name[cpu] = "Unknown";

		else

			__cpu_full_name[cpu] = cpu_full_name;

	}



	config = iocsr_read32(LOONGARCH_IOCSR_FEATURES);

	if (config & IOCSRF_CSRIPI)

		c->options |= LOONGARCH_CPU_CSRIPI;

arch/loongarch/kernel/proc.c

+2 −0
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) 
{

	unsigned long n = (unsigned long) v - 1;

	unsigned int isa = cpu_data[n].isa_level;

	unsigned int prid = cpu_data[n].processor_id;

	unsigned int version = cpu_data[n].processor_id & 0xff;

	unsigned int fp_version = cpu_data[n].fpu_vers;
@@ -37,6 +38,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) 
	seq_printf(m, "global_id\t\t: %d\n", cpu_data[n].global_id);

	seq_printf(m, "CPU Family\t\t: %s\n", __cpu_family[n]);

	seq_printf(m, "Model Name\t\t: %s\n", __cpu_full_name[n]);

	seq_printf(m, "PRID\t\t\t: %s (%08x)\n", id_to_core_name(prid), prid);

	seq_printf(m, "CPU Revision\t\t: 0x%02x\n", version);

	seq_printf(m, "FPU Revision\t\t: 0x%02x\n", fp_version);

	seq_printf(m, "CPU MHz\t\t\t: %llu.%02llu\n",