Commit 1d6866e8 authored by Runyang Chen's avatar Runyang Chen Committed by Wim Van Sebroeck
Browse files

dt-bindings: reset: mt8186: add reset-controller header file 



1. Add toprgu reset-controller header file for MT8186.
2. Add DSI software reset bit which is controlled in MMSYS for MT8186.

Signed-off-by: default avatarRunyang Chen <runyang.chen@mediatek.com>
Signed-off-by: default avatarRex-BC Chen <rex-bc.chen@mediatek.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Reviewed-by: default avatarGuenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20220301054405.25021-3-rex-bc.chen@mediatek.com


Signed-off-by: default avatarGuenter Roeck <linux@roeck-us.net>
Signed-off-by: default avatarWim Van Sebroeck <wim@linux-watchdog.org>
parent a45b408a

include/dt-bindings/reset/mt8186-resets.h

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+36 −0
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */

/*

 * Copyright (c) 2022 MediaTek Inc.

 * Author: Runyang Chen <runyang.chen@mediatek.com>

 */



#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8186

#define _DT_BINDINGS_RESET_CONTROLLER_MT8186



#define MT8186_TOPRGU_INFRA_SW_RST				0

#define MT8186_TOPRGU_MM_SW_RST					1

#define MT8186_TOPRGU_MFG_SW_RST				2

#define MT8186_TOPRGU_VENC_SW_RST				3

#define MT8186_TOPRGU_VDEC_SW_RST				4

#define MT8186_TOPRGU_IMG_SW_RST				5

#define MT8186_TOPRGU_DDR_SW_RST				6

#define MT8186_TOPRGU_INFRA_AO_SW_RST				8

#define MT8186_TOPRGU_CONNSYS_SW_RST				9

#define MT8186_TOPRGU_APMIXED_SW_RST				10

#define MT8186_TOPRGU_PWRAP_SW_RST				11

#define MT8186_TOPRGU_CONN_MCU_SW_RST				12

#define MT8186_TOPRGU_IPNNA_SW_RST				13

#define MT8186_TOPRGU_WPE_SW_RST				14

#define MT8186_TOPRGU_ADSP_SW_RST				15

#define MT8186_TOPRGU_AUDIO_SW_RST				17

#define MT8186_TOPRGU_CAM_MAIN_SW_RST				18

#define MT8186_TOPRGU_CAM_RAWA_SW_RST				19

#define MT8186_TOPRGU_CAM_RAWB_SW_RST				20

#define MT8186_TOPRGU_IPE_SW_RST				21

#define MT8186_TOPRGU_IMG2_SW_RST				22

#define MT8186_TOPRGU_SW_RST_NUM				23



/* MMSYS resets */

#define MT8186_MMSYS_SW0_RST_B_DISP_DSI0			19



#endif  /* _DT_BINDINGS_RESET_CONTROLLER_MT8186 */