Commit 1d80a686 authored by Linus Walleij's avatar Linus Walleij
Browse files

Merge tag 'samsung-pinctrl-6.19' of... 

Merge tag 'samsung-pinctrl-6.19' of https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung

 into devel

Samsung pinctrl drivers changes for v6.19

Add pin controller support for Samsung Exynos8890 and Axis ARTPEC-9
SoCs.  The latter is a newer design of Artpec SoCs made/designed by
Samsung, thus it shares most of the core blocks with Samsung Exynos,
including the pinctrl.

Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parents ea2bfb85 3cfc60e0

Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-wakeup-interrupt.yaml

+1 −0
Original line number Diff line number Diff line
@@ -41,6 +41,7 @@ properties: 
              - samsung,exynos7870-wakeup-eint

              - samsung,exynos7885-wakeup-eint

              - samsung,exynos850-wakeup-eint

              - samsung,exynos8890-wakeup-eint

              - samsung,exynos8895-wakeup-eint

          - const: samsung,exynos7-wakeup-eint

      - items:

Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml

+5 −1
Original line number Diff line number Diff line
@@ -36,6 +36,7 @@ properties: 
  compatible:

    enum:

      - axis,artpec8-pinctrl

      - axis,artpec9-pinctrl

      - google,gs101-pinctrl

      - samsung,s3c64xx-pinctrl

      - samsung,s5pv210-pinctrl
@@ -52,6 +53,7 @@ properties: 
      - samsung,exynos7870-pinctrl

      - samsung,exynos7885-pinctrl

      - samsung,exynos850-pinctrl

      - samsung,exynos8890-pinctrl

      - samsung,exynos8895-pinctrl

      - samsung,exynos9810-pinctrl

      - samsung,exynos990-pinctrl
@@ -133,7 +135,9 @@ allOf: 
      properties:

        compatible:

          contains:

            const: google,gs101-pinctrl

            enum:

              - google,gs101-pinctrl

              - samsung,exynos8890-pinctrl

    then:

      required:

        - clocks

drivers/pinctrl/samsung/pinctrl-exynos-arm64.c

+206 −0
Original line number Diff line number Diff line
@@ -1485,6 +1485,163 @@ const struct samsung_pinctrl_of_match_data exynosautov920_of_data __initconst = 
	.num_ctrl	= ARRAY_SIZE(exynosautov920_pin_ctrl),

};



/* pin banks of exynos8890 pin-controller 0 (ALIVE) */

static const struct samsung_pin_bank_data exynos8890_pin_banks0[] __initconst = {

	/* Must start with EINTG banks, ordered by EINT group number. */

	EXYNOS7870_PIN_BANK_EINTW(8, 0x000, "gpa0", 0x00),

	EXYNOS7870_PIN_BANK_EINTW(8, 0x020, "gpa1", 0x04),

	EXYNOS7870_PIN_BANK_EINTW(8, 0x040, "gpa2", 0x08),

	EXYNOS7870_PIN_BANK_EINTW(8, 0x060, "gpa3", 0x0c),

};



/* pin banks of exynos8890 pin-controller 1 (AUD) */

static const struct samsung_pin_bank_data exynos8890_pin_banks1[] __initconst = {

	/* Must start with EINTG banks, ordered by EINT group number. */

	EXYNOS8895_PIN_BANK_EINTG(7, 0x000, "gph0", 0x00),

};



/* pin banks of exynos8890 pin-controller 2 (CCORE) */

static const struct samsung_pin_bank_data exynos8890_pin_banks2[] __initconst = {

	/* Must start with EINTG banks, ordered by EINT group number. */

	EXYNOS8895_PIN_BANK_EINTG(2, 0x000, "etc0", 0x00),

};



/* pin banks of exynos8890 pin-controller 3 (ESE) */

static const struct samsung_pin_bank_data exynos8890_pin_banks3[] __initconst = {

	/* Must start with EINTG banks, ordered by EINT group number. */

	EXYNOS8895_PIN_BANK_EINTG(5, 0x000, "gpf3", 0x00),

};



/* pin banks of exynos8890 pin-controller 4 (FP) */

static const struct samsung_pin_bank_data exynos8890_pin_banks4[] __initconst = {

	/* Must start with EINTG banks, ordered by EINT group number. */

	EXYNOS8895_PIN_BANK_EINTG(4, 0x000, "gpf2", 0x00),

};



/* pin banks of exynos8890 pin-controller 5 (FSYS0) */

static const struct samsung_pin_bank_data exynos8890_pin_banks5[] __initconst = {

	/* Must start with EINTG banks, ordered by EINT group number. */

	EXYNOS8895_PIN_BANK_EINTG(4, 0x000, "gpi1", 0x00),

	EXYNOS8895_PIN_BANK_EINTG(8, 0x020, "gpi2", 0x04),

};



/* pin banks of exynos8890 pin-controller 6 (FSYS1) */

static const struct samsung_pin_bank_data exynos8890_pin_banks6[] __initconst = {

	/* Must start with EINTG banks, ordered by EINT group number. */

	EXYNOS8895_PIN_BANK_EINTG(7, 0x000, "gpj0", 0x00),

};



/* pin banks of exynos8890 pin-controller 7 (NFC) */

static const struct samsung_pin_bank_data exynos8890_pin_banks7[] __initconst = {

	/* Must start with EINTG banks, ordered by EINT group number. */

	EXYNOS8895_PIN_BANK_EINTG(3, 0x000, "gpf0", 0x00),

};



/* pin banks of exynos8890 pin-controller 8 (PERIC0) */

static const struct samsung_pin_bank_data exynos8890_pin_banks8[] __initconst = {

	/* Must start with EINTG banks, ordered by EINT group number. */

	EXYNOS8895_PIN_BANK_EINTG(6, 0x000, "gpi0", 0x00),

	EXYNOS8895_PIN_BANK_EINTG(8, 0x020, "gpd0", 0x04),

	EXYNOS8895_PIN_BANK_EINTG(6, 0x040, "gpd1", 0x08),

	EXYNOS8895_PIN_BANK_EINTG(4, 0x060, "gpd2", 0x0c),

	EXYNOS8895_PIN_BANK_EINTG(4, 0x080, "gpd3", 0x10),

	EXYNOS8895_PIN_BANK_EINTG(2, 0x0A0, "gpb1", 0x14),

	EXYNOS8895_PIN_BANK_EINTG(2, 0x0C0, "gpb2", 0x18),

	EXYNOS8895_PIN_BANK_EINTG(3, 0x0E0, "gpb0", 0x1c),

	EXYNOS8895_PIN_BANK_EINTG(5, 0x100, "gpc0", 0x20),

	EXYNOS8895_PIN_BANK_EINTG(5, 0x120, "gpc1", 0x24),

	EXYNOS8895_PIN_BANK_EINTG(6, 0x140, "gpc2", 0x28),

	EXYNOS8895_PIN_BANK_EINTG(8, 0x160, "gpc3", 0x2c),

	EXYNOS8895_PIN_BANK_EINTG(4, 0x180, "gpk0", 0x30),

	EXYNOS8895_PIN_BANK_EINTG(7, 0x1A0, "etc1", 0x34),

};



/* pin banks of exynos8890 pin-controller 9 (PERIC1) */

static const struct samsung_pin_bank_data exynos8890_pin_banks9[] __initconst = {

	/* Must start with EINTG banks, ordered by EINT group number. */

	EXYNOS8895_PIN_BANK_EINTG(8, 0x000, "gpe0", 0x00),

	EXYNOS8895_PIN_BANK_EINTG(8, 0x020, "gpe5", 0x04),

	EXYNOS8895_PIN_BANK_EINTG(8, 0x040, "gpe6", 0x08),

	EXYNOS8895_PIN_BANK_EINTG(8, 0x060, "gpj1", 0x0c),

	EXYNOS8895_PIN_BANK_EINTG(2, 0x080, "gpj2", 0x10),

	EXYNOS8895_PIN_BANK_EINTG(8, 0x0A0, "gpe2", 0x14),

	EXYNOS8895_PIN_BANK_EINTG(8, 0x0C0, "gpe3", 0x18),

	EXYNOS8895_PIN_BANK_EINTG(8, 0x0E0, "gpe4", 0x1c),

	EXYNOS8895_PIN_BANK_EINTG(8, 0x100, "gpe1", 0x20),

	EXYNOS8895_PIN_BANK_EINTG(4, 0x120, "gpe7", 0x24),

	EXYNOS8895_PIN_BANK_EINTG(3, 0x140, "gpg0", 0x28),

};



/* pin banks of exynos8890 pin-controller 10 (TOUCH) */

static const struct samsung_pin_bank_data exynos8890_pin_banks10[] __initconst = {

	/* Must start with EINTG banks, ordered by EINT group number. */

	EXYNOS8895_PIN_BANK_EINTG(3, 0x000, "gpf1", 0x00),

};



static const struct samsung_pin_ctrl exynos8890_pin_ctrl[] __initconst = {

	{

		/* pin-controller instance 0 Alive data */

		.pin_banks	= exynos8890_pin_banks0,

		.nr_banks	= ARRAY_SIZE(exynos8890_pin_banks0),

		.eint_wkup_init = exynos_eint_wkup_init,

	}, {

		/* pin-controller instance 1 AUD data */

		.pin_banks	= exynos8890_pin_banks1,

		.nr_banks	= ARRAY_SIZE(exynos8890_pin_banks1),

		.eint_gpio_init = exynos_eint_gpio_init,

	}, {

		/* pin-controller instance 2 CCORE data */

		.pin_banks	= exynos8890_pin_banks2,

		.nr_banks	= ARRAY_SIZE(exynos8890_pin_banks2),

		.eint_gpio_init = exynos_eint_gpio_init,

	}, {

		/* pin-controller instance 3 ESE data */

		.pin_banks	= exynos8890_pin_banks3,

		.nr_banks	= ARRAY_SIZE(exynos8890_pin_banks3),

		.eint_gpio_init = exynos_eint_gpio_init,

	}, {

		/* pin-controller instance 4 FP data */

		.pin_banks	= exynos8890_pin_banks4,

		.nr_banks	= ARRAY_SIZE(exynos8890_pin_banks4),

		.eint_gpio_init = exynos_eint_gpio_init,

	}, {

		/* pin-controller instance 5 FSYS0 data */

		.pin_banks	= exynos8890_pin_banks5,

		.nr_banks	= ARRAY_SIZE(exynos8890_pin_banks5),

		.eint_gpio_init = exynos_eint_gpio_init,

	}, {

		/* pin-controller instance 6 FSYS1 data */

		.pin_banks	= exynos8890_pin_banks6,

		.nr_banks	= ARRAY_SIZE(exynos8890_pin_banks6),

		.eint_gpio_init = exynos_eint_gpio_init,

	}, {

		/* pin-controller instance 7 NFC data */

		.pin_banks	= exynos8890_pin_banks7,

		.nr_banks	= ARRAY_SIZE(exynos8890_pin_banks7),

		.eint_gpio_init = exynos_eint_gpio_init,

	}, {

		/* pin-controller instance 8 PERIC0 data */

		.pin_banks	= exynos8890_pin_banks8,

		.nr_banks	= ARRAY_SIZE(exynos8890_pin_banks8),

		.eint_gpio_init = exynos_eint_gpio_init,

	}, {

		/* pin-controller instance 9 PERIC1 data */

		.pin_banks	= exynos8890_pin_banks9,

		.nr_banks	= ARRAY_SIZE(exynos8890_pin_banks9),

		.eint_gpio_init = exynos_eint_gpio_init,

	}, {

		/* pin-controller instance 10 TOUCH data */

		.pin_banks	= exynos8890_pin_banks10,

		.nr_banks	= ARRAY_SIZE(exynos8890_pin_banks10),

		.eint_gpio_init = exynos_eint_gpio_init,

	},

};



const struct samsung_pinctrl_of_match_data exynos8890_of_data __initconst = {

	.ctrl		= exynos8890_pin_ctrl,

	.num_ctrl	= ARRAY_SIZE(exynos8890_pin_ctrl),

};



/* pin banks of exynos8895 pin-controller 0 (ALIVE) */

static const struct samsung_pin_bank_data exynos8895_pin_banks0[] __initconst = {

	EXYNOS_PIN_BANK_EINTW(8, 0x020, "gpa0", 0x00),
@@ -1866,3 +2023,52 @@ const struct samsung_pinctrl_of_match_data artpec8_of_data __initconst = { 
	.ctrl		= artpec8_pin_ctrl,

	.num_ctrl	= ARRAY_SIZE(artpec8_pin_ctrl),

};



/* pin banks of artpec9 pin-controller (FSYS0) */

static const struct samsung_pin_bank_data artpec9_pin_banks0[] __initconst = {

	ARTPEC_PIN_BANK_EINTG(8, 0x000, "gpf0", 0x00),

	ARTPEC_PIN_BANK_EINTG(8, 0x020, "gpf1", 0x04),

	ARTPEC_PIN_BANK_EINTG(8, 0x040, "gpe0", 0x08),

	ARTPEC_PIN_BANK_EINTG(8, 0x060, "gpe1", 0x0c),

	ARTPEC_PIN_BANK_EINTG(8, 0x080, "gpe2", 0x10),

	ARTPEC_PIN_BANK_EINTG(8, 0x0a0, "gpe3", 0x14),

	ARTPEC_PIN_BANK_EINTG(2, 0x0c0, "gpe4", 0x18),

	ARTPEC_PIN_BANK_EINTG(8, 0x0e0, "gps0", 0x1c),

	ARTPEC_PIN_BANK_EINTG(8, 0x100, "gps1", 0x20),

	ARTPEC_PIN_BANK_EINTG(5, 0x120, "gpi0", 0x24),

};



/* pin banks of artpec9 pin-controller (FSYS1) */

static const struct samsung_pin_bank_data artpec9_pin_banks1[] __initconst = {

	ARTPEC_PIN_BANK_EINTG(2, 0x000, "gpu0", 0x00),

};



/* pin banks of artpec9 pin-controller (PERIC) */

static const struct samsung_pin_bank_data artpec9_pin_banks2[] __initconst = {

	ARTPEC_PIN_BANK_EINTG(8, 0x000, "gpa0", 0x00),

	ARTPEC_PIN_BANK_EINTG(8, 0x020, "gpa1", 0x04),

};



static const struct samsung_pin_ctrl artpec9_pin_ctrl[] __initconst = {

	{

		/* pin-controller instance 0 FSYS0 data */

		.pin_banks	= artpec9_pin_banks0,

		.nr_banks	= ARRAY_SIZE(artpec9_pin_banks0),

		.eint_gpio_init	= exynos_eint_gpio_init,

	}, {

		/* pin-controller instance 1 FSYS1 data */

		.pin_banks	= artpec9_pin_banks1,

		.nr_banks	= ARRAY_SIZE(artpec9_pin_banks1),

		.eint_gpio_init	= exynos_eint_gpio_init,

	}, {

		/* pin-controller instance 2 PERIC data */

		.pin_banks	= artpec9_pin_banks2,

		.nr_banks	= ARRAY_SIZE(artpec9_pin_banks2),

		.eint_gpio_init	= exynos_eint_gpio_init,

	},

};



const struct samsung_pinctrl_of_match_data artpec9_of_data __initconst = {

	.ctrl		= artpec9_pin_ctrl,

	.num_ctrl	= ARRAY_SIZE(artpec9_pin_ctrl),

};

drivers/pinctrl/samsung/pinctrl-samsung.c

+4 −0
Original line number Diff line number Diff line
@@ -1484,6 +1484,8 @@ static const struct of_device_id samsung_pinctrl_dt_match[] = { 
#ifdef CONFIG_PINCTRL_EXYNOS_ARM64

	{ .compatible = "axis,artpec8-pinctrl",

		.data = &artpec8_of_data },

	{ .compatible = "axis,artpec9-pinctrl",

		.data = &artpec9_of_data },

	{ .compatible = "google,gs101-pinctrl",

		.data = &gs101_of_data },

	{ .compatible = "samsung,exynos2200-pinctrl",
@@ -1498,6 +1500,8 @@ static const struct of_device_id samsung_pinctrl_dt_match[] = { 
		.data = &exynos7885_of_data },

	{ .compatible = "samsung,exynos850-pinctrl",

		.data = &exynos850_of_data },

	{ .compatible = "samsung,exynos8890-pinctrl",

		.data = &exynos8890_of_data },

	{ .compatible = "samsung,exynos8895-pinctrl",

		.data = &exynos8895_of_data },

	{ .compatible = "samsung,exynos9810-pinctrl",

drivers/pinctrl/samsung/pinctrl-samsung.h

+2 −0
Original line number Diff line number Diff line
@@ -382,6 +382,7 @@ struct samsung_pmx_func { 


/* list of all exported SoC specific data */

extern const struct samsung_pinctrl_of_match_data artpec8_of_data;

extern const struct samsung_pinctrl_of_match_data artpec9_of_data;

extern const struct samsung_pinctrl_of_match_data exynos2200_of_data;

extern const struct samsung_pinctrl_of_match_data exynos3250_of_data;

extern const struct samsung_pinctrl_of_match_data exynos4210_of_data;
@@ -395,6 +396,7 @@ extern const struct samsung_pinctrl_of_match_data exynos7_of_data; 
extern const struct samsung_pinctrl_of_match_data exynos7870_of_data;

extern const struct samsung_pinctrl_of_match_data exynos7885_of_data;

extern const struct samsung_pinctrl_of_match_data exynos850_of_data;

extern const struct samsung_pinctrl_of_match_data exynos8890_of_data;

extern const struct samsung_pinctrl_of_match_data exynos8895_of_data;

extern const struct samsung_pinctrl_of_match_data exynos9810_of_data;

extern const struct samsung_pinctrl_of_match_data exynos990_of_data;