Commit 1dc64320 authored by Sean Christopherson's avatar Sean Christopherson
Browse files

KVM: nVMX: Remove explicit filtering of GUEST_INTR_STATUS from shadow VMCS fields 



Drop KVM's filtering of GUEST_INTR_STATUS when generating the shadow VMCS
bitmap now that KVM drops GUEST_INTR_STATUS from the set of supported
vmcs12 fields if the field isn't supported by hardware, and initialization
of the shadow VMCS fields omits unsupported vmcs12 fields.

Note, there is technically a small functional change here, as the vmcs12
filtering only requires support for Virtual Interrupt Delivery, whereas
the shadow VMCS code being removed required "full" APICv support, i.e.
required Virtual Interrupt Delivery *and* APIC Register Virtualizaton *and*
Posted Interrupt support.

Opportunistically tweak the comment to more precisely explain why the
PML and VMX preemption timer fields need to be explicitly checked.

Reviewed-by: default avatarXiaoyao Li <xiaoyao.li@intel.com>
Link: https://patch.msgid.link/20260115173427.716021-5-seanjc@google.com


Signed-off-by: default avatarSean Christopherson <seanjc@google.com>
parent 5fdf86e7

arch/x86/kvm/vmx/nested.c

+4 −7
Original line number Diff line number Diff line
@@ -118,9 +118,10 @@ static void init_vmcs_shadow_fields(void) 
			continue;



		/*

		 * PML and the preemption timer can be emulated, but the

		 * processor cannot vmwrite to fields that don't exist

		 * on bare metal.

		 * KVM emulates PML and the VMX preemption timer irrespective

		 * of hardware support, but shadowing their related VMCS fields

		 * requires hardware support as the CPU will reject VMWRITEs to

		 * fields that don't exist.

		 */

		switch (field) {

		case GUEST_PML_INDEX:
@@ -131,10 +132,6 @@ static void init_vmcs_shadow_fields(void) 
			if (!cpu_has_vmx_preemption_timer())

				continue;

			break;

		case GUEST_INTR_STATUS:

			if (!cpu_has_vmx_apicv())

				continue;

			break;

		default:

			break;

		}