Commit 1de3d9e2 authored by Niklas Söderlund's avatar Niklas Söderlund Committed by Geert Uytterhoeven
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dt-bindings: clock: r8a779a0: Add ZG core clock

parent 3a866087
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+1 −0
Original line number Diff line number Diff line
@@ -51,5 +51,6 @@
#define R8A779A0_CLK_CBFUSA		40
#define R8A779A0_CLK_R			41
#define R8A779A0_CLK_OSC		42
#define R8A779A0_CLK_ZG			43

#endif /* __DT_BINDINGS_CLOCK_R8A779A0_CPG_MSSR_H__ */