Commit 1e11b549 authored by David E. Box's avatar David E. Box Committed by Bjorn Helgaas
Browse files

PCI/ASPM: Move pci_save_ltr_state() to aspm.c 



Even when CONFIG_PCIEASPM is not set, we save and restore the LTR
Capability so that if ASPM L1.2 and LTR were configured by the platform,
ASPM L1.2 will still work after suspend/resume, when that platform
configuration may be lost. See dbbfadf2 ("PCI/ASPM: Save LTR Capability
for suspend/resume").

Since ASPM L1.2 depends on the LTR Capability, move the save/restore code
to the part of aspm.c that is always compiled regardless of
CONFIG_PCIEASPM.  No functional change intended.

Suggested-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20240128233212.1139663-5-david.e.box@linux.intel.com
[bhelgaas: commit log, reorder to make this a pure move]
Link: https://lore.kernel.org/r/20240223205851.114931-4-helgaas@kernel.org


Signed-off-by: default avatarDavid E. Box <david.e.box@linux.intel.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
parent f3994bba

drivers/pci/pci.c

+0 −40
Original line number Diff line number Diff line
@@ -1689,46 +1689,6 @@ static void pci_restore_pcix_state(struct pci_dev *dev) 
	pci_write_config_word(dev, pos + PCI_X_CMD, cap[i++]);

}



static void pci_save_ltr_state(struct pci_dev *dev)

{

	int ltr;

	struct pci_cap_saved_state *save_state;

	u32 *cap;



	if (!pci_is_pcie(dev))

		return;



	ltr = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_LTR);

	if (!ltr)

		return;



	save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_LTR);

	if (!save_state) {

		pci_err(dev, "no suspend buffer for LTR; ASPM issues possible after resume\n");

		return;

	}



	/* Some broken devices only support dword access to LTR */

	cap = &save_state->cap.data[0];

	pci_read_config_dword(dev, ltr + PCI_LTR_MAX_SNOOP_LAT, cap);

}



static void pci_restore_ltr_state(struct pci_dev *dev)

{

	struct pci_cap_saved_state *save_state;

	int ltr;

	u32 *cap;



	save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_LTR);

	ltr = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_LTR);

	if (!save_state || !ltr)

		return;



	/* Some broken devices only support dword access to LTR */

	cap = &save_state->cap.data[0];

	pci_write_config_dword(dev, ltr + PCI_LTR_MAX_SNOOP_LAT, *cap);

}



/**

 * pci_save_state - save the PCI configuration space of a device before

 *		    suspending

drivers/pci/pci.h

+5 −0
Original line number Diff line number Diff line
@@ -567,6 +567,11 @@ pci_ers_result_t pcie_do_recovery(struct pci_dev *dev, 


bool pcie_wait_for_link(struct pci_dev *pdev, bool active);

int pcie_retrain_link(struct pci_dev *pdev, bool use_lt);



/* ASPM-related functionality we need even without CONFIG_PCIEASPM */

void pci_save_ltr_state(struct pci_dev *dev);

void pci_restore_ltr_state(struct pci_dev *dev);



#ifdef CONFIG_PCIEASPM

void pcie_aspm_init_link_state(struct pci_dev *pdev);

void pcie_aspm_exit_link_state(struct pci_dev *pdev);

drivers/pci/pcie/aspm.c

+40 −0
Original line number Diff line number Diff line
@@ -24,6 +24,46 @@ 


#include "../pci.h"



void pci_save_ltr_state(struct pci_dev *dev)

{

	int ltr;

	struct pci_cap_saved_state *save_state;

	u32 *cap;



	if (!pci_is_pcie(dev))

		return;



	ltr = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_LTR);

	if (!ltr)

		return;



	save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_LTR);

	if (!save_state) {

		pci_err(dev, "no suspend buffer for LTR; ASPM issues possible after resume\n");

		return;

	}



	/* Some broken devices only support dword access to LTR */

	cap = &save_state->cap.data[0];

	pci_read_config_dword(dev, ltr + PCI_LTR_MAX_SNOOP_LAT, cap);

}



void pci_restore_ltr_state(struct pci_dev *dev)

{

	struct pci_cap_saved_state *save_state;

	int ltr;

	u32 *cap;



	save_state = pci_find_saved_ext_cap(dev, PCI_EXT_CAP_ID_LTR);

	ltr = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_LTR);

	if (!save_state || !ltr)

		return;



	/* Some broken devices only support dword access to LTR */

	cap = &save_state->cap.data[0];

	pci_write_config_dword(dev, ltr + PCI_LTR_MAX_SNOOP_LAT, *cap);

}



#ifdef CONFIG_PCIEASPM



#ifdef MODULE_PARAM_PREFIX