Commit 1f1cb7f0 authored by Dan Williams's avatar Dan Williams Committed by Dave Jiang
Browse files

cxl/mem: Arrange for always-synchronous memdev attach 



In preparation for CXL accelerator drivers that have a hard dependency on
CXL capability initialization, arrange for cxl_mem_probe() to always run
synchronous with the device_add() of cxl_memdev instances. I.e.
cxl_mem_driver registration is always complete before the first memdev
creation event.

At present, cxl_pci does not care about the attach state of the cxl_memdev
because all generic memory expansion functionality can be handled by the
cxl_core. For accelerators, however, that driver needs to perform driver
specific initialization if CXL is available, or execute a fallback to PCIe
only operation.

This synchronous attach guarantee is also needed for Soft Reserve Recovery,
which is an effort that needs to assert that devices have had a chance to
attach before making a go / no-go decision on proceeding with CXL subsystem
initialization.

By moving devm_cxl_add_memdev() to cxl_mem.ko it removes async module
loading as one reason that a memdev may not be attached upon return from
devm_cxl_add_memdev().

Cc: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com>
Cc: Alejandro Lucero <alucerop@amd.com>
Reviewed-by: default avatarJonathan Cameron <jonathan.cameron@huawei.com>
Tested-by: default avatarAlison Schofield <alison.schofield@intel.com>
Reviewed-by: default avatarAlison Schofield <alison.schofield@intel.com>
Reviewed-by: default avatarBen Cheatham <benjamin.cheatham@amd.com>
Reviewed-by: default avatarDave Jiang <dave.jiang@intel.com>
Tested-by: default avatarAlejandro Lucero <alucerop@amd.com>
Link: https://patch.msgid.link/20251216005616.3090129-3-dan.j.williams@intel.com


Signed-off-by: default avatarDan Williams <dan.j.williams@intel.com>
Signed-off-by: default avatarDave Jiang <dave.jiang@intel.com>
parent 10016118

drivers/cxl/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ if CXL_BUS 
config CXL_PCI

	tristate "PCI manageability"

	default CXL_BUS

	select CXL_MEM

	help

	  The CXL specification defines a "CXL memory device" sub-class in the

	  PCI "memory controller" base class of devices. Device's identified by
@@ -89,7 +90,6 @@ config CXL_PMEM 


config CXL_MEM

	tristate "CXL: Memory Expansion"

	depends on CXL_PCI

	default CXL_BUS

	help

	  The CXL.mem protocol allows a device to act as a provider of "System

drivers/cxl/core/memdev.c

+7 −3
Original line number Diff line number Diff line
@@ -1050,7 +1050,11 @@ static const struct file_operations cxl_memdev_fops = { 
	.llseek = noop_llseek,

};



struct cxl_memdev *devm_cxl_add_memdev(struct device *host,

/*

 * Core helper for devm_cxl_add_memdev() that wants to both create a device and

 * assert to the caller that upon return cxl_mem::probe() has been invoked.

 */

struct cxl_memdev *__devm_cxl_add_memdev(struct device *host,

					 struct cxl_dev_state *cxlds)

{

	struct cxl_memdev *cxlmd;
@@ -1093,7 +1097,7 @@ struct cxl_memdev *devm_cxl_add_memdev(struct device *host, 
	put_device(dev);

	return ERR_PTR(rc);

}

EXPORT_SYMBOL_NS_GPL(devm_cxl_add_memdev, "CXL");

EXPORT_SYMBOL_FOR_MODULES(__devm_cxl_add_memdev, "cxl_mem");



static void sanitize_teardown_notifier(void *data)

{

drivers/cxl/cxlmem.h

+2 −0
Original line number Diff line number Diff line
@@ -95,6 +95,8 @@ static inline bool is_cxl_endpoint(struct cxl_port *port) 
	return is_cxl_memdev(port->uport_dev);

}



struct cxl_memdev *__devm_cxl_add_memdev(struct device *host,

					 struct cxl_dev_state *cxlds);

struct cxl_memdev *devm_cxl_add_memdev(struct device *host,

				       struct cxl_dev_state *cxlds);

int devm_cxl_sanitize_setup_notifier(struct device *host,

drivers/cxl/mem.c

+17 −0
Original line number Diff line number Diff line
@@ -201,6 +201,22 @@ static int cxl_mem_probe(struct device *dev) 
	return devm_add_action_or_reset(dev, enable_suspend, NULL);

}



/**

 * devm_cxl_add_memdev - Add a CXL memory device

 * @host: devres alloc/release context and parent for the memdev

 * @cxlds: CXL device state to associate with the memdev

 *

 * Upon return the device will have had a chance to attach to the

 * cxl_mem driver, but may fail if the CXL topology is not ready

 * (hardware CXL link down, or software platform CXL root not attached)

 */

struct cxl_memdev *devm_cxl_add_memdev(struct device *host,

				       struct cxl_dev_state *cxlds)

{

	return __devm_cxl_add_memdev(host, cxlds);

}

EXPORT_SYMBOL_NS_GPL(devm_cxl_add_memdev, "CXL");



static ssize_t trigger_poison_list_store(struct device *dev,

					 struct device_attribute *attr,

					 const char *buf, size_t len)
@@ -248,6 +264,7 @@ static struct cxl_driver cxl_mem_driver = { 
	.probe = cxl_mem_probe,

	.id = CXL_DEVICE_MEMORY_EXPANDER,

	.drv = {

		.probe_type = PROBE_FORCE_SYNCHRONOUS,

		.dev_groups = cxl_mem_groups,

	},

};