Loading arch/openrisc/Kconfig +9 −0 Original line number Diff line number Diff line Loading @@ -188,6 +188,15 @@ config SMP If you don't know what to do here, say N. config FPU bool "FPU support" default y help Say N here if you want to disable all floating-point related procedures in the kernel and reduce binary size. If you don't know what to do here, say Y. source "kernel/Kconfig.hz" config OPENRISC_NO_SPR_SR_DSX Loading arch/openrisc/kernel/ptrace.c +6 −0 Original line number Diff line number Diff line Loading @@ -88,6 +88,7 @@ static int genregs_set(struct task_struct *target, return ret; } #ifdef CONFIG_FPU /* * As OpenRISC shares GPRs and floating point registers we don't need to export * the floating point registers again. So here we only export the fpcsr special Loading Loading @@ -115,13 +116,16 @@ static int fpregs_set(struct task_struct *target, ®s->fpcsr, 0, 4); return ret; } #endif /* * Define the register sets available on OpenRISC under Linux */ enum or1k_regset { REGSET_GENERAL, #ifdef CONFIG_FPU REGSET_FPU, #endif }; static const struct user_regset or1k_regsets[] = { Loading @@ -133,6 +137,7 @@ static const struct user_regset or1k_regsets[] = { .regset_get = genregs_get, .set = genregs_set, }, #ifdef CONFIG_FPU [REGSET_FPU] = { .core_note_type = NT_PRFPREG, .n = sizeof(struct __or1k_fpu_state) / sizeof(long), Loading @@ -141,6 +146,7 @@ static const struct user_regset or1k_regsets[] = { .regset_get = fpregs_get, .set = fpregs_set, }, #endif }; static const struct user_regset_view user_or1k_native_view = { Loading arch/openrisc/kernel/traps.c +2 −1 Original line number Diff line number Diff line Loading @@ -182,6 +182,7 @@ asmlinkage void do_fpe_trap(struct pt_regs *regs, unsigned long address) { if (user_mode(regs)) { int code = FPE_FLTUNK; #ifdef CONFIG_FPU unsigned long fpcsr = regs->fpcsr; if (fpcsr & SPR_FPCSR_IVF) Loading @@ -197,7 +198,7 @@ asmlinkage void do_fpe_trap(struct pt_regs *regs, unsigned long address) /* Clear all flags */ regs->fpcsr &= ~SPR_FPCSR_ALLF; #endif force_sig_fault(SIGFPE, code, (void __user *)regs->pc); } else { pr_emerg("KERNEL: Illegal fpe exception 0x%.8lx\n", regs->pc); Loading Loading
arch/openrisc/Kconfig +9 −0 Original line number Diff line number Diff line Loading @@ -188,6 +188,15 @@ config SMP If you don't know what to do here, say N. config FPU bool "FPU support" default y help Say N here if you want to disable all floating-point related procedures in the kernel and reduce binary size. If you don't know what to do here, say Y. source "kernel/Kconfig.hz" config OPENRISC_NO_SPR_SR_DSX Loading
arch/openrisc/kernel/ptrace.c +6 −0 Original line number Diff line number Diff line Loading @@ -88,6 +88,7 @@ static int genregs_set(struct task_struct *target, return ret; } #ifdef CONFIG_FPU /* * As OpenRISC shares GPRs and floating point registers we don't need to export * the floating point registers again. So here we only export the fpcsr special Loading Loading @@ -115,13 +116,16 @@ static int fpregs_set(struct task_struct *target, ®s->fpcsr, 0, 4); return ret; } #endif /* * Define the register sets available on OpenRISC under Linux */ enum or1k_regset { REGSET_GENERAL, #ifdef CONFIG_FPU REGSET_FPU, #endif }; static const struct user_regset or1k_regsets[] = { Loading @@ -133,6 +137,7 @@ static const struct user_regset or1k_regsets[] = { .regset_get = genregs_get, .set = genregs_set, }, #ifdef CONFIG_FPU [REGSET_FPU] = { .core_note_type = NT_PRFPREG, .n = sizeof(struct __or1k_fpu_state) / sizeof(long), Loading @@ -141,6 +146,7 @@ static const struct user_regset or1k_regsets[] = { .regset_get = fpregs_get, .set = fpregs_set, }, #endif }; static const struct user_regset_view user_or1k_native_view = { Loading
arch/openrisc/kernel/traps.c +2 −1 Original line number Diff line number Diff line Loading @@ -182,6 +182,7 @@ asmlinkage void do_fpe_trap(struct pt_regs *regs, unsigned long address) { if (user_mode(regs)) { int code = FPE_FLTUNK; #ifdef CONFIG_FPU unsigned long fpcsr = regs->fpcsr; if (fpcsr & SPR_FPCSR_IVF) Loading @@ -197,7 +198,7 @@ asmlinkage void do_fpe_trap(struct pt_regs *regs, unsigned long address) /* Clear all flags */ regs->fpcsr &= ~SPR_FPCSR_ALLF; #endif force_sig_fault(SIGFPE, code, (void __user *)regs->pc); } else { pr_emerg("KERNEL: Illegal fpe exception 0x%.8lx\n", regs->pc); Loading