Commit 1f3838b8 authored by Fan Gong's avatar Fan Gong Committed by Paolo Abeni
Browse files

hinic3: Add Rss function 



Initialize rss functions. Configure rss hash data and HW resources.

Co-developed-by: default avatarZhu Yikai <zhuyikai1@h-partners.com>
Signed-off-by: default avatarZhu Yikai <zhuyikai1@h-partners.com>
Signed-off-by: default avatarFan Gong <gongfan1@huawei.com>
Link: https://patch.msgid.link/a69336e9b174950be5fe2c14f3450790f18eb293.1757653621.git.zhuyikai1@h-partners.com


Signed-off-by: default avatarPaolo Abeni <pabeni@redhat.com>
parent b83bb584

drivers/net/ethernet/huawei/hinic3/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -19,6 +19,7 @@ hinic3-objs := hinic3_cmdq.o \ 
	       hinic3_nic_cfg.o \

	       hinic3_nic_io.o \

	       hinic3_queue_common.o \

	       hinic3_rss.o \

	       hinic3_rx.o \

	       hinic3_tx.o \

	       hinic3_wq.o

drivers/net/ethernet/huawei/hinic3/hinic3_main.c

+7 −1
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ 
#include "hinic3_nic_cfg.h"

#include "hinic3_nic_dev.h"

#include "hinic3_nic_io.h"

#include "hinic3_rss.h"

#include "hinic3_rx.h"

#include "hinic3_tx.h"
@@ -134,6 +135,8 @@ static int hinic3_sw_init(struct net_device *netdev) 
	nic_dev->q_params.sq_depth = HINIC3_SQ_DEPTH;

	nic_dev->q_params.rq_depth = HINIC3_RQ_DEPTH;



	hinic3_try_to_enable_rss(netdev);



	/* VF driver always uses random MAC address. During VM migration to a

	 * new device, the new device should learn the VMs old MAC rather than

	 * provide its own MAC. The product design assumes that every VF is
@@ -145,7 +148,7 @@ static int hinic3_sw_init(struct net_device *netdev) 
			     hinic3_global_func_id(hwdev));

	if (err) {

		dev_err(hwdev->dev, "Failed to set default MAC\n");

		return err;

		goto err_clear_rss_config;

	}



	err = hinic3_alloc_txrxqs(netdev);
@@ -159,6 +162,8 @@ static int hinic3_sw_init(struct net_device *netdev) 
err_del_mac:

	hinic3_del_mac(hwdev, netdev->dev_addr, 0,

		       hinic3_global_func_id(hwdev));

err_clear_rss_config:

	hinic3_clear_rss_config(netdev);



	return err;

}
@@ -170,6 +175,7 @@ static void hinic3_sw_uninit(struct net_device *netdev) 
	hinic3_free_txrxqs(netdev);

	hinic3_del_mac(nic_dev->hwdev, netdev->dev_addr, 0,

		       hinic3_global_func_id(nic_dev->hwdev));

	hinic3_clear_rss_config(netdev);

}



static void hinic3_assign_netdev_ops(struct net_device *netdev)

drivers/net/ethernet/huawei/hinic3/hinic3_mgmt_interface.h

+55 −0
Original line number Diff line number Diff line
@@ -87,9 +87,59 @@ struct l2nic_cmd_set_dcb_state { 
	u8                   rsvd[7];

};



#define L2NIC_RSS_TYPE_VALID_MASK         BIT(23)

#define L2NIC_RSS_TYPE_TCP_IPV6_EXT_MASK  BIT(24)

#define L2NIC_RSS_TYPE_IPV6_EXT_MASK      BIT(25)

#define L2NIC_RSS_TYPE_TCP_IPV6_MASK      BIT(26)

#define L2NIC_RSS_TYPE_IPV6_MASK          BIT(27)

#define L2NIC_RSS_TYPE_TCP_IPV4_MASK      BIT(28)

#define L2NIC_RSS_TYPE_IPV4_MASK          BIT(29)

#define L2NIC_RSS_TYPE_UDP_IPV6_MASK      BIT(30)

#define L2NIC_RSS_TYPE_UDP_IPV4_MASK      BIT(31)

#define L2NIC_RSS_TYPE_SET(val, member)  \

	FIELD_PREP(L2NIC_RSS_TYPE_##member##_MASK, val)

#define L2NIC_RSS_TYPE_GET(val, member)  \

	FIELD_GET(L2NIC_RSS_TYPE_##member##_MASK, val)



#define L2NIC_RSS_INDIR_SIZE  256

#define L2NIC_RSS_KEY_SIZE    40



/* IEEE 802.1Qaz std */

#define L2NIC_DCB_COS_MAX     0x8



struct l2nic_cmd_set_rss_ctx_tbl {

	struct mgmt_msg_head msg_head;

	u16                  func_id;

	u16                  rsvd1;

	u32                  context;

};



struct l2nic_cmd_cfg_rss_engine {

	struct mgmt_msg_head msg_head;

	u16                  func_id;

	u8                   opcode;

	u8                   hash_engine;

	u8                   rsvd1[4];

};



struct l2nic_cmd_cfg_rss_hash_key {

	struct mgmt_msg_head msg_head;

	u16                  func_id;

	u8                   opcode;

	u8                   rsvd1;

	u8                   key[L2NIC_RSS_KEY_SIZE];

};



struct l2nic_cmd_cfg_rss {

	struct mgmt_msg_head msg_head;

	u16                  func_id;

	u8                   rss_en;

	u8                   rq_priority_number;

	u8                   prio_tc[L2NIC_DCB_COS_MAX];

	u16                  num_qps;

	u16                  rsvd1;

};



/* Commands between NIC to fw */

enum l2nic_cmd {

	/* FUNC CFG */
@@ -110,6 +160,11 @@ enum l2nic_cmd { 
	L2NIC_CMD_MAX                 = 256,

};



struct l2nic_cmd_rss_set_indir_tbl {

	__le32 rsvd[4];

	__le16 entry[L2NIC_RSS_INDIR_SIZE];

};



/* NIC CMDQ MODE */

enum l2nic_ucode_cmd {

	L2NIC_UCODE_CMD_MODIFY_QUEUE_CTX  = 0,

drivers/net/ethernet/huawei/hinic3/hinic3_netdev_ops.c

+18 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ 
#include "hinic3_nic_cfg.h"

#include "hinic3_nic_dev.h"

#include "hinic3_nic_io.h"

#include "hinic3_rss.h"

#include "hinic3_rx.h"

#include "hinic3_tx.h"
@@ -222,9 +223,25 @@ static int hinic3_configure(struct net_device *netdev) 
	/* Ensure DCB is disabled */

	hinic3_sync_dcb_state(nic_dev->hwdev, 1, 0);



	if (test_bit(HINIC3_RSS_ENABLE, &nic_dev->flags)) {

		err = hinic3_rss_init(netdev);

		if (err) {

			netdev_err(netdev, "Failed to init rss\n");

			return err;

		}

	}



	return 0;

}



static void hinic3_remove_configure(struct net_device *netdev)

{

	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);



	if (test_bit(HINIC3_RSS_ENABLE, &nic_dev->flags))

		hinic3_rss_uninit(netdev);

}



static int hinic3_alloc_channel_resources(struct net_device *netdev,

					  struct hinic3_dyna_qp_params *qp_params,

					  struct hinic3_dyna_txrxq_params *trxq_params)
@@ -305,6 +322,7 @@ static void hinic3_close_channel(struct net_device *netdev) 
{

	struct hinic3_nic_dev *nic_dev = netdev_priv(netdev);



	hinic3_remove_configure(netdev);

	hinic3_qps_irq_uninit(netdev);

	hinic3_free_qp_ctxts(nic_dev);

}

drivers/net/ethernet/huawei/hinic3/hinic3_nic_dev.h

+5 −0
Original line number Diff line number Diff line
@@ -73,6 +73,11 @@ struct hinic3_nic_dev { 
	struct hinic3_txq               *txqs;

	struct hinic3_rxq               *rxqs;



	enum hinic3_rss_hash_type       rss_hash_type;

	struct hinic3_rss_type          rss_type;

	u8                              *rss_hkey;

	u16                             *rss_indir;



	u16                             num_qp_irq;

	struct msix_entry               *qps_msix_entries;