Commit 1f5e307c authored by Lu Baolu's avatar Lu Baolu Committed by Joerg Roedel
Browse files

iommu/vt-d: Unconditionally flush device TLB for pasid table updates 



The caching mode of an IOMMU is irrelevant to the behavior of the device
TLB. Previously, commit <304b3bde> ("iommu/vt-d: Remove caching mode
check before device TLB flush") removed this redundant check in the
domain unmap path.

Checking the caching mode before flushing the device TLB after a pasid
table entry is updated is unnecessary and can lead to inconsistent
behavior.

Extends this consistency by removing the caching mode check in the pasid
table update path.

Suggested-by: default avatarYi Liu <yi.l.liu@intel.com>
Signed-off-by: default avatarLu Baolu <baolu.lu@linux.intel.com>
Link: https://lore.kernel.org/r/20240820030208.20020-1-baolu.lu@linux.intel.com


Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
parent ccb02b27

drivers/iommu/intel/pasid.c

+3 −9
Original line number Diff line number Diff line
@@ -264,8 +264,6 @@ void intel_pasid_tear_down_entry(struct intel_iommu *iommu, struct device *dev, 
	else

		iommu->flush.flush_iotlb(iommu, did, 0, 0, DMA_TLB_DSI_FLUSH);



	/* Device IOTLB doesn't need to be flushed in caching mode. */

	if (!cap_caching_mode(iommu->cap))

	devtlb_invalidation_with_pasid(iommu, dev, pasid);

}
@@ -493,8 +491,6 @@ int intel_pasid_setup_dirty_tracking(struct intel_iommu *iommu, 


	iommu->flush.flush_iotlb(iommu, did, 0, 0, DMA_TLB_DSI_FLUSH);



	/* Device IOTLB doesn't need to be flushed in caching mode. */

	if (!cap_caching_mode(iommu->cap))

	devtlb_invalidation_with_pasid(iommu, dev, pasid);



	return 0;
@@ -572,8 +568,6 @@ void intel_pasid_setup_page_snoop_control(struct intel_iommu *iommu, 
	pasid_cache_invalidation_with_pasid(iommu, did, pasid);

	qi_flush_piotlb(iommu, did, pasid, 0, -1, 0);



	/* Device IOTLB doesn't need to be flushed in caching mode. */

	if (!cap_caching_mode(iommu->cap))

	devtlb_invalidation_with_pasid(iommu, dev, pasid);

}