Commit 1f858883 authored by Michael Shavit's avatar Michael Shavit Committed by Will Deacon
Browse files

iommu/arm-smmu-v3: Replace s1_cfg with cdtab_cfg 



Remove struct arm_smmu_s1_cfg. This is really just a CD table with a
bit of extra information. Move other attributes of the CD table that
were held there into the existing CD table structure, struct
arm_smmu_ctx_desc_cfg, and replace all usages of arm_smmu_s1_cfg with
arm_smmu_ctx_desc_cfg.

For clarity, use the name "cd_table" for the variables pointing to
arm_smmu_ctx_desc_cfg in the new code instead of cdcfg. A later patch
will make this fully consistent.

Reviewed-by: default avatarJason Gunthorpe <jgg@nvidia.com>
Reviewed-by: default avatarNicolin Chen <nicolinc@nvidia.com>
Signed-off-by: default avatarMichael Shavit <mshavit@google.com>
Tested-by: default avatarNicolin Chen <nicolinc@nvidia.com>
Link: https://lore.kernel.org/r/20230915211705.v8.2.I1ef1ed19d7786c8176a0d05820c869e650c8d68f@changeid


Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent 987a878e

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

+20 −21
Original line number Diff line number Diff line
@@ -1033,9 +1033,9 @@ static __le64 *arm_smmu_get_cd_ptr(struct arm_smmu_domain *smmu_domain, 
	unsigned int idx;

	struct arm_smmu_l1_ctx_desc *l1_desc;

	struct arm_smmu_device *smmu = smmu_domain->smmu;

	struct arm_smmu_ctx_desc_cfg *cdcfg = &smmu_domain->s1_cfg.cdcfg;

	struct arm_smmu_ctx_desc_cfg *cdcfg = &smmu_domain->cd_table;



	if (smmu_domain->s1_cfg.s1fmt == STRTAB_STE_0_S1FMT_LINEAR)

	if (cdcfg->s1fmt == STRTAB_STE_0_S1FMT_LINEAR)

		return cdcfg->cdtab + ssid * CTXDESC_CD_DWORDS;



	idx = ssid >> CTXDESC_SPLIT;
@@ -1071,7 +1071,7 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_domain *smmu_domain, int ssid, 
	bool cd_live;

	__le64 *cdptr;



	if (WARN_ON(ssid >= (1 << smmu_domain->s1_cfg.s1cdmax)))

	if (WARN_ON(ssid >= (1 << smmu_domain->cd_table.s1cdmax)))

		return -E2BIG;



	cdptr = arm_smmu_get_cd_ptr(smmu_domain, ssid);
@@ -1138,19 +1138,18 @@ static int arm_smmu_alloc_cd_tables(struct arm_smmu_domain *smmu_domain) 
	size_t l1size;

	size_t max_contexts;

	struct arm_smmu_device *smmu = smmu_domain->smmu;

	struct arm_smmu_s1_cfg *cfg = &smmu_domain->s1_cfg;

	struct arm_smmu_ctx_desc_cfg *cdcfg = &cfg->cdcfg;

	struct arm_smmu_ctx_desc_cfg *cdcfg = &smmu_domain->cd_table;



	max_contexts = 1 << cfg->s1cdmax;

	max_contexts = 1 << cdcfg->s1cdmax;



	if (!(smmu->features & ARM_SMMU_FEAT_2_LVL_CDTAB) ||

	    max_contexts <= CTXDESC_L2_ENTRIES) {

		cfg->s1fmt = STRTAB_STE_0_S1FMT_LINEAR;

		cdcfg->s1fmt = STRTAB_STE_0_S1FMT_LINEAR;

		cdcfg->num_l1_ents = max_contexts;



		l1size = max_contexts * (CTXDESC_CD_DWORDS << 3);

	} else {

		cfg->s1fmt = STRTAB_STE_0_S1FMT_64K_L2;

		cdcfg->s1fmt = STRTAB_STE_0_S1FMT_64K_L2;

		cdcfg->num_l1_ents = DIV_ROUND_UP(max_contexts,

						  CTXDESC_L2_ENTRIES);
@@ -1186,7 +1185,7 @@ static void arm_smmu_free_cd_tables(struct arm_smmu_domain *smmu_domain) 
	int i;

	size_t size, l1size;

	struct arm_smmu_device *smmu = smmu_domain->smmu;

	struct arm_smmu_ctx_desc_cfg *cdcfg = &smmu_domain->s1_cfg.cdcfg;

	struct arm_smmu_ctx_desc_cfg *cdcfg = &smmu_domain->cd_table;



	if (cdcfg->l1_desc) {

		size = CTXDESC_L2_ENTRIES * (CTXDESC_CD_DWORDS << 3);
@@ -1276,7 +1275,7 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid, 
	u64 val = le64_to_cpu(dst[0]);

	bool ste_live = false;

	struct arm_smmu_device *smmu = NULL;

	struct arm_smmu_s1_cfg *s1_cfg = NULL;

	struct arm_smmu_ctx_desc_cfg *cd_table = NULL;

	struct arm_smmu_s2_cfg *s2_cfg = NULL;

	struct arm_smmu_domain *smmu_domain = NULL;

	struct arm_smmu_cmdq_ent prefetch_cmd = {
@@ -1294,7 +1293,7 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid, 
	if (smmu_domain) {

		switch (smmu_domain->stage) {

		case ARM_SMMU_DOMAIN_S1:

			s1_cfg = &smmu_domain->s1_cfg;

			cd_table = &smmu_domain->cd_table;

			break;

		case ARM_SMMU_DOMAIN_S2:

		case ARM_SMMU_DOMAIN_NESTED:
@@ -1325,7 +1324,7 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid, 
	val = STRTAB_STE_0_V;



	/* Bypass/fault */

	if (!smmu_domain || !(s1_cfg || s2_cfg)) {

	if (!smmu_domain || !(cd_table || s2_cfg)) {

		if (!smmu_domain && disable_bypass)

			val |= FIELD_PREP(STRTAB_STE_0_CFG, STRTAB_STE_0_CFG_ABORT);

		else
@@ -1344,7 +1343,7 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid, 
		return;

	}



	if (s1_cfg) {

	if (cd_table) {

		u64 strw = smmu->features & ARM_SMMU_FEAT_E2H ?

			STRTAB_STE_1_STRW_EL2 : STRTAB_STE_1_STRW_NSEL1;
@@ -1360,10 +1359,10 @@ static void arm_smmu_write_strtab_ent(struct arm_smmu_master *master, u32 sid, 
		    !master->stall_enabled)

			dst[1] |= cpu_to_le64(STRTAB_STE_1_S1STALLD);



		val |= (s1_cfg->cdcfg.cdtab_dma & STRTAB_STE_0_S1CTXPTR_MASK) |

		val |= (cd_table->cdtab_dma & STRTAB_STE_0_S1CTXPTR_MASK) |

			FIELD_PREP(STRTAB_STE_0_CFG, STRTAB_STE_0_CFG_S1_TRANS) |

			FIELD_PREP(STRTAB_STE_0_S1CDMAX, s1_cfg->s1cdmax) |

			FIELD_PREP(STRTAB_STE_0_S1FMT, s1_cfg->s1fmt);

			FIELD_PREP(STRTAB_STE_0_S1CDMAX, cd_table->s1cdmax) |

			FIELD_PREP(STRTAB_STE_0_S1FMT, cd_table->s1fmt);

	}



	if (s2_cfg) {
@@ -2069,11 +2068,11 @@ static void arm_smmu_domain_free(struct iommu_domain *domain) 


	/* Free the CD and ASID, if we allocated them */

	if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1) {

		struct arm_smmu_s1_cfg *cfg = &smmu_domain->s1_cfg;

		struct arm_smmu_ctx_desc_cfg *cd_table = &smmu_domain->cd_table;



		/* Prevent SVA from touching the CD while we're freeing it */

		mutex_lock(&arm_smmu_asid_lock);

		if (cfg->cdcfg.cdtab)

		if (cd_table->cdtab)

			arm_smmu_free_cd_tables(smmu_domain);

		arm_smmu_free_asid(&smmu_domain->cd);

		mutex_unlock(&arm_smmu_asid_lock);
@@ -2093,7 +2092,7 @@ static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain, 
	int ret;

	u32 asid;

	struct arm_smmu_device *smmu = smmu_domain->smmu;

	struct arm_smmu_s1_cfg *cfg = &smmu_domain->s1_cfg;

	struct arm_smmu_ctx_desc_cfg *cd_table = &smmu_domain->cd_table;

	struct arm_smmu_ctx_desc *cd = &smmu_domain->cd;

	typeof(&pgtbl_cfg->arm_lpae_s1_cfg.tcr) tcr = &pgtbl_cfg->arm_lpae_s1_cfg.tcr;
@@ -2106,7 +2105,7 @@ static int arm_smmu_domain_finalise_s1(struct arm_smmu_domain *smmu_domain, 
	if (ret)

		goto out_unlock;



	cfg->s1cdmax = master->ssid_bits;

	cd_table->s1cdmax = master->ssid_bits;



	smmu_domain->stall_enabled = master->stall_enabled;
@@ -2446,7 +2445,7 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) 
		ret = -EINVAL;

		goto out_unlock;

	} else if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1 &&

		   master->ssid_bits != smmu_domain->s1_cfg.s1cdmax) {

		   master->ssid_bits != smmu_domain->cd_table.s1cdmax) {

		ret = -EINVAL;

		goto out_unlock;

	} else if (smmu_domain->stage == ARM_SMMU_DOMAIN_S1 &&

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h

+2 −5
Original line number Diff line number Diff line
@@ -595,11 +595,8 @@ struct arm_smmu_ctx_desc_cfg { 
	dma_addr_t			cdtab_dma;

	struct arm_smmu_l1_ctx_desc	*l1_desc;

	unsigned int			num_l1_ents;

};



struct arm_smmu_s1_cfg {

	struct arm_smmu_ctx_desc_cfg	cdcfg;

	u8				s1fmt;

	/* log2 of the maximum number of CDs supported by this table */

	u8				s1cdmax;

};
@@ -725,7 +722,7 @@ struct arm_smmu_domain { 
	union {

		struct {

		struct arm_smmu_ctx_desc	cd;

		struct arm_smmu_s1_cfg		s1_cfg;

		struct arm_smmu_ctx_desc_cfg	cd_table;

		};

		struct arm_smmu_s2_cfg	s2_cfg;

	};