Commit 1fbe3abb authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski Committed by Linus Walleij
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pinctrl: qcom: sm8350-lpass-lpi: Merge with SC7280 to fix I2S2 and SWR TX pins 



Qualcomm SC7280 and SM8350 SoCs have slightly different LPASS audio
blocks (v9.4.5 and v9.2), however the LPASS LPI pin controllers are
exactly the same.  The driver for SM8350 has two issues, which can be
fixed by simply moving over to SC7280 driver which has them correct:

1. "i2s2_data_groups" listed twice GPIO12, but should have both GPIO12
   and GPIO13,

2. "swr_tx_data_groups" contained GPIO5 for "swr_tx_data2" function, but
   that function is also available on GPIO14, thus listing it twice is
   not necessary.  OTOH, GPIO5 has also "swr_rx_data1", so selecting
   swr_rx_data function should not block  the TX one.

Fixes: be9f6d56 ("pinctrl: qcom: sm8350-lpass-lpi: add SM8350 LPASS TLMM")
Cc: stable@vger.kernel.org
Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Reviewed-by: default avatarBartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: default avatarLinus Walleij <linusw@kernel.org>
parent 28f24068

arch/arm64/configs/defconfig

+0 −1
Original line number Diff line number Diff line
@@ -670,7 +670,6 @@ CONFIG_PINCTRL_LPASS_LPI=m 
CONFIG_PINCTRL_SC7280_LPASS_LPI=m

CONFIG_PINCTRL_SM6115_LPASS_LPI=m

CONFIG_PINCTRL_SM8250_LPASS_LPI=m

CONFIG_PINCTRL_SM8350_LPASS_LPI=m

CONFIG_PINCTRL_SM8450_LPASS_LPI=m

CONFIG_PINCTRL_SC8280XP_LPASS_LPI=m

CONFIG_PINCTRL_SM8550_LPASS_LPI=m

drivers/pinctrl/qcom/Kconfig

+3 −12
Original line number Diff line number Diff line
@@ -61,13 +61,14 @@ config PINCTRL_LPASS_LPI 
	  (Low Power Island) found on the Qualcomm Technologies Inc SoCs.



config PINCTRL_SC7280_LPASS_LPI

	tristate "Qualcomm Technologies Inc SC7280 LPASS LPI pin controller driver"

	tristate "Qualcomm Technologies Inc SC7280 and SM8350 LPASS LPI pin controller driver"

	depends on ARM64 || COMPILE_TEST

	depends on PINCTRL_LPASS_LPI

	help

	  This is the pinctrl, pinmux, pinconf and gpiolib driver for the

	  Qualcomm Technologies Inc LPASS (Low Power Audio SubSystem) LPI

	  (Low Power Island) found on the Qualcomm Technologies Inc SC7280 platform.

	  (Low Power Island) found on the Qualcomm Technologies Inc SC7280

	  and SM8350 platforms.



config PINCTRL_SDM660_LPASS_LPI

	tristate "Qualcomm Technologies Inc SDM660 LPASS LPI pin controller driver"
@@ -106,16 +107,6 @@ config PINCTRL_SM8250_LPASS_LPI 
	  Qualcomm Technologies Inc LPASS (Low Power Audio SubSystem) LPI

	  (Low Power Island) found on the Qualcomm Technologies Inc SM8250 platform.



config PINCTRL_SM8350_LPASS_LPI

	tristate "Qualcomm Technologies Inc SM8350 LPASS LPI pin controller driver"

	depends on ARM64 || COMPILE_TEST

	depends on PINCTRL_LPASS_LPI

	help

	  This is the pinctrl, pinmux, pinconf and gpiolib driver for the

	  Qualcomm Technologies Inc LPASS (Low Power Audio SubSystem) LPI

	  (Low Power Island) found on the Qualcomm Technologies Inc SM8350

	  platform.



config PINCTRL_SM8450_LPASS_LPI

	tristate "Qualcomm Technologies Inc SM8450 LPASS LPI pin controller driver"

	depends on ARM64 || COMPILE_TEST

drivers/pinctrl/qcom/Makefile

+0 −1
Original line number Diff line number Diff line
@@ -64,7 +64,6 @@ obj-$(CONFIG_PINCTRL_SM8150) += pinctrl-sm8150.o 
obj-$(CONFIG_PINCTRL_SM8250) += pinctrl-sm8250.o

obj-$(CONFIG_PINCTRL_SM8250_LPASS_LPI) += pinctrl-sm8250-lpass-lpi.o

obj-$(CONFIG_PINCTRL_SM8350) += pinctrl-sm8350.o

obj-$(CONFIG_PINCTRL_SM8350_LPASS_LPI) += pinctrl-sm8350-lpass-lpi.o

obj-$(CONFIG_PINCTRL_SM8450) += pinctrl-sm8450.o

obj-$(CONFIG_PINCTRL_SM8450_LPASS_LPI) += pinctrl-sm8450-lpass-lpi.o

obj-$(CONFIG_PINCTRL_SM8550) += pinctrl-sm8550.o

drivers/pinctrl/qcom/pinctrl-sc7280-lpass-lpi.c

+3 −0
Original line number Diff line number Diff line
@@ -131,6 +131,9 @@ static const struct of_device_id lpi_pinctrl_of_match[] = { 
	{

	       .compatible = "qcom,sc7280-lpass-lpi-pinctrl",

	       .data = &sc7280_lpi_data,

	}, {

	       .compatible = "qcom,sm8350-lpass-lpi-pinctrl",

	       .data = &sc7280_lpi_data,

	},

	{ }

};

drivers/pinctrl/qcom/pinctrl-sm8350-lpass-lpi.c

deleted100644 → 0
+0 −151
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.

 * Copyright (c) 2020-2023 Linaro Ltd.

 */



#include <linux/gpio/driver.h>

#include <linux/module.h>

#include <linux/platform_device.h>



#include "pinctrl-lpass-lpi.h"



enum lpass_lpi_functions {

	LPI_MUX_dmic1_clk,

	LPI_MUX_dmic1_data,

	LPI_MUX_dmic2_clk,

	LPI_MUX_dmic2_data,

	LPI_MUX_dmic3_clk,

	LPI_MUX_dmic3_data,

	LPI_MUX_i2s1_clk,

	LPI_MUX_i2s1_data,

	LPI_MUX_i2s1_ws,

	LPI_MUX_i2s2_clk,

	LPI_MUX_i2s2_data,

	LPI_MUX_i2s2_ws,

	LPI_MUX_qua_mi2s_data,

	LPI_MUX_qua_mi2s_sclk,

	LPI_MUX_qua_mi2s_ws,

	LPI_MUX_swr_rx_clk,

	LPI_MUX_swr_rx_data,

	LPI_MUX_swr_tx_clk,

	LPI_MUX_swr_tx_data,

	LPI_MUX_wsa_swr_clk,

	LPI_MUX_wsa_swr_data,

	LPI_MUX_gpio,

	LPI_MUX__,

};



static const struct pinctrl_pin_desc sm8350_lpi_pins[] = {

	PINCTRL_PIN(0, "gpio0"),

	PINCTRL_PIN(1, "gpio1"),

	PINCTRL_PIN(2, "gpio2"),

	PINCTRL_PIN(3, "gpio3"),

	PINCTRL_PIN(4, "gpio4"),

	PINCTRL_PIN(5, "gpio5"),

	PINCTRL_PIN(6, "gpio6"),

	PINCTRL_PIN(7, "gpio7"),

	PINCTRL_PIN(8, "gpio8"),

	PINCTRL_PIN(9, "gpio9"),

	PINCTRL_PIN(10, "gpio10"),

	PINCTRL_PIN(11, "gpio11"),

	PINCTRL_PIN(12, "gpio12"),

	PINCTRL_PIN(13, "gpio13"),

	PINCTRL_PIN(14, "gpio14"),

};



static const char * const swr_tx_clk_groups[] = { "gpio0" };

static const char * const swr_tx_data_groups[] = { "gpio1", "gpio2", "gpio5", "gpio14" };

static const char * const swr_rx_clk_groups[] = { "gpio3" };

static const char * const swr_rx_data_groups[] = { "gpio4", "gpio5" };

static const char * const dmic1_clk_groups[] = { "gpio6" };

static const char * const dmic1_data_groups[] = { "gpio7" };

static const char * const dmic2_clk_groups[] = { "gpio8" };

static const char * const dmic2_data_groups[] = { "gpio9" };

static const char * const i2s2_clk_groups[] = { "gpio10" };

static const char * const i2s2_ws_groups[] = { "gpio11" };

static const char * const dmic3_clk_groups[] = { "gpio12" };

static const char * const dmic3_data_groups[] = { "gpio13" };

static const char * const qua_mi2s_sclk_groups[] = { "gpio0" };

static const char * const qua_mi2s_ws_groups[] = { "gpio1" };

static const char * const qua_mi2s_data_groups[] = { "gpio2", "gpio3", "gpio4" };

static const char * const i2s1_clk_groups[] = { "gpio6" };

static const char * const i2s1_ws_groups[] = { "gpio7" };

static const char * const i2s1_data_groups[] = { "gpio8", "gpio9" };

static const char * const wsa_swr_clk_groups[] = { "gpio10" };

static const char * const wsa_swr_data_groups[] = { "gpio11" };

static const char * const i2s2_data_groups[] = { "gpio12", "gpio12" };



static const struct lpi_pingroup sm8350_groups[] = {

	LPI_PINGROUP(0, 0, swr_tx_clk, qua_mi2s_sclk, _, _),

	LPI_PINGROUP(1, 2, swr_tx_data, qua_mi2s_ws, _, _),

	LPI_PINGROUP(2, 4, swr_tx_data, qua_mi2s_data, _, _),

	LPI_PINGROUP(3, 8, swr_rx_clk, qua_mi2s_data, _, _),

	LPI_PINGROUP(4, 10, swr_rx_data, qua_mi2s_data, _, _),

	LPI_PINGROUP(5, 12, swr_tx_data, swr_rx_data, _, _),

	LPI_PINGROUP(6, LPI_NO_SLEW, dmic1_clk, i2s1_clk, _,  _),

	LPI_PINGROUP(7, LPI_NO_SLEW, dmic1_data, i2s1_ws, _, _),

	LPI_PINGROUP(8, LPI_NO_SLEW, dmic2_clk, i2s1_data, _, _),

	LPI_PINGROUP(9, LPI_NO_SLEW, dmic2_data, i2s1_data, _, _),

	LPI_PINGROUP(10, 16, i2s2_clk, wsa_swr_clk, _, _),

	LPI_PINGROUP(11, 18, i2s2_ws, wsa_swr_data, _, _),

	LPI_PINGROUP(12, LPI_NO_SLEW, dmic3_clk, i2s2_data, _, _),

	LPI_PINGROUP(13, LPI_NO_SLEW, dmic3_data, i2s2_data, _, _),

	LPI_PINGROUP(14, 6, swr_tx_data, _, _, _),

};



static const struct lpi_function sm8350_functions[] = {

	LPI_FUNCTION(dmic1_clk),

	LPI_FUNCTION(dmic1_data),

	LPI_FUNCTION(dmic2_clk),

	LPI_FUNCTION(dmic2_data),

	LPI_FUNCTION(dmic3_clk),

	LPI_FUNCTION(dmic3_data),

	LPI_FUNCTION(i2s1_clk),

	LPI_FUNCTION(i2s1_data),

	LPI_FUNCTION(i2s1_ws),

	LPI_FUNCTION(i2s2_clk),

	LPI_FUNCTION(i2s2_data),

	LPI_FUNCTION(i2s2_ws),

	LPI_FUNCTION(qua_mi2s_data),

	LPI_FUNCTION(qua_mi2s_sclk),

	LPI_FUNCTION(qua_mi2s_ws),

	LPI_FUNCTION(swr_rx_clk),

	LPI_FUNCTION(swr_rx_data),

	LPI_FUNCTION(swr_tx_clk),

	LPI_FUNCTION(swr_tx_data),

	LPI_FUNCTION(wsa_swr_clk),

	LPI_FUNCTION(wsa_swr_data),

};



static const struct lpi_pinctrl_variant_data sm8350_lpi_data = {

	.pins = sm8350_lpi_pins,

	.npins = ARRAY_SIZE(sm8350_lpi_pins),

	.groups = sm8350_groups,

	.ngroups = ARRAY_SIZE(sm8350_groups),

	.functions = sm8350_functions,

	.nfunctions = ARRAY_SIZE(sm8350_functions),

};



static const struct of_device_id lpi_pinctrl_of_match[] = {

	{

	       .compatible = "qcom,sm8350-lpass-lpi-pinctrl",

	       .data = &sm8350_lpi_data,

	},

	{ }

};

MODULE_DEVICE_TABLE(of, lpi_pinctrl_of_match);



static struct platform_driver lpi_pinctrl_driver = {

	.driver = {

		   .name = "qcom-sm8350-lpass-lpi-pinctrl",

		   .of_match_table = lpi_pinctrl_of_match,

	},

	.probe = lpi_pinctrl_probe,

	.remove = lpi_pinctrl_remove,

};

module_platform_driver(lpi_pinctrl_driver);



MODULE_AUTHOR("Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>");

MODULE_DESCRIPTION("QTI SM8350 LPI GPIO pin control driver");

MODULE_LICENSE("GPL");