Commit 1fcb3dc1 authored by Yannic Moog's avatar Yannic Moog Committed by Shawn Guo
Browse files

arm64: dts: imx8mm: move bulk of rtc properties to carrierboards



Move properties from SoM's dtsi to carrierboard's dts as they are
actually defined by the carrier board design.

Signed-off-by: default avatarYannic Moog <y.moog@phytec.de>
Signed-off-by: default avatarAndrej Picej <andrej.picej@norik.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 111073fc
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+10 −0
Original line number Diff line number Diff line
@@ -221,6 +221,10 @@ &pcie_phy {

/* RTC */
&rv3028 {
	interrupt-parent = <&gpio1>;
	interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
	pinctrl-0 = <&pinctrl_rtc>;
	pinctrl-names = "default";
	aux-voltage-chargeable = <1>;
	trickle-resistor-ohms = <3000>;
	wakeup-source;
@@ -410,6 +414,12 @@ MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x40
		>;
	};

	pinctrl_rtc: rtcgrp {
		fsl,pins = <
			MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3		0x1c0
		>;
	};

	pinctrl_tpm: tpmgrp {
		fsl,pins = <
			MX8MM_IOMUXC_SD1_STROBE_GPIO2_IO11      0x140
+0 −10
Original line number Diff line number Diff line
@@ -301,10 +301,6 @@ eeprom@51 {
	/* RTC */
	rv3028: rtc@52 {
		compatible = "microcrystal,rv3028";
		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
		interrupt-parent = <&gpio1>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_rtc>;
		reg = <0x52>;
	};
};
@@ -377,12 +373,6 @@ MX8MM_IOMUXC_I2C1_SCL_GPIO5_IO14 0x1e0
		>;
	};

	pinctrl_rtc: rtcgrp {
		fsl,pins = <
			MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3		0x1c0
		>;
	};

	pinctrl_sn65dsi83: sn65dsi83grp {
		fsl,pins = <
			MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10		0x0
+10 −0
Original line number Diff line number Diff line
@@ -215,6 +215,10 @@ &pwm4 {

/* RTC */
&rv3028 {
	interrupt-parent = <&gpio1>;
	interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
	pinctrl-0 = <&pinctrl_rtc>;
	pinctrl-names = "default";
	aux-voltage-chargeable = <1>;
	trickle-resistor-ohms = <3000>;
	wakeup-source;
@@ -395,6 +399,12 @@ MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x40
		>;
	};

	pinctrl_rtc: rtcgrp {
		fsl,pins = <
			MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3		0x1c0
		>;
	};

	pinctrl_tempsense: tempsensegrp {
		fsl,pins = <
			MX8MM_IOMUXC_SAI3_TXFS_GPIO4_IO31	0x00