Commit 20077583 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull MMC updates from Ulf Hansson:
 "MMC core:
   - Don't force a retune before eMMC RPMB switch
   - Add optional HS400 tuning in HS400es initialization
   - Add a sysfs node to for write-protect-group-size
   - Add re-tuning test to the mmc-test module
   - Use mrq.sbc to support close-ended ioctl requests

  MMC host:
   - mmci: Add support for SDIO in-band irqs for the stm32 variant
   - mmc_spi: Remove broken support custom DMA mapped buffers
   - mtk-sd: Improve and extend the support for tunings
   - renesas_sdhi: Document support for the RZ/Five variant
   - sdhci_am654: Drop support for the ti,otap-del-sel DT property
   - sdhci-brcmstb: Add support for the brcm 74165b0 variant
   - sdhci-msm: Add compatibles for IPQ4019 and IPQ8074
   - sdhci-of-dwcmshc: Add support for the T-Head TH1520 variant
   - sdhci-xenon: Add support for the Marvell ac5 variant"

* tag 'mmc-v6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (27 commits)
  mmc: xenon: Add ac5 support via bounce buffer
  dt-bindings: mmc: add Marvell ac5
  mmc: sdhci-brcmstb: add new sdhci reset sequence for brcm 74165b0
  dt-bindings: mmc: brcm,sdhci-brcmstb: Add support for 74165b0
  mmc: core: Do not force a retune before RPMB switch
  mmc: core: Add HS400 tuning in HS400es initialization
  mmc: sdhci_omap: Fix TI SoC dependencies
  mmc: sdhci_am654: Fix TI SoC dependencies
  mmc: core: Add wp_grp_size sysfs node
  mmc: mmc_test: Add re-tuning test
  mmc: mmc_spi: remove custom DMA mapped buffers
  dt-bindings: mmc: sdhci-msm: document dedicated IPQ4019 and IPQ8074
  dt-bindings: mmc: synopsys-dw-mshc: add iommus for Intel SocFPGA
  mmc: mtk-sd: Extend number of tuning steps
  dt-bindings: mmc: mtk-sd: add tuning steps related property
  mmc: sdhci-omap: don't misuse kernel-doc marker
  mmc: mtk-sd: Increase the verbosity of msdc_track_cmd_data
  mmc: core: Use mrq.sbc in close-ended ffu
  mmc: sdhci_am654: Drop lookup for deprecated ti,otap-del-sel
  mmc: sdhci-of-dwcmshc: Use logical OR instead of bitwise OR in dwcmshc_probe()
  ...
parents 0c4b09cb 5d402133
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+4 −4
Original line number Diff line number Diff line
@@ -226,8 +226,8 @@ examples:
          interrupt-parent = <&gic>;
          interrupts = <0 48 4>;
          reg = <0xff160000 0x1000>;
          clocks = <&clk200>, <&clk200>;
          clock-names = "clk_xin", "clk_ahb";
          clocks = <&clk200>, <&clk200>, <&clk1200>;
          clock-names = "clk_xin", "clk_ahb", "gate";
          clock-output-names = "clk_out_sd0", "clk_in_sd0";
          #clock-cells = <1>;
          clk-phase-sd-hs = <63>, <72>;
@@ -239,8 +239,8 @@ examples:
          interrupt-parent = <&gic>;
          interrupts = <0 126 4>;
          reg = <0xf1040000 0x10000>;
          clocks = <&clk200>, <&clk200>;
          clock-names = "clk_xin", "clk_ahb";
          clocks = <&clk200>, <&clk200>, <&clk1200>;
          clock-names = "clk_xin", "clk_ahb", "gate";
          clock-output-names = "clk_out_sd0", "clk_in_sd0";
          #clock-cells = <1>;
          clk-phase-sd-hs = <132>, <60>;
+1 −3
Original line number Diff line number Diff line
@@ -20,10 +20,8 @@ properties:
          - const: brcm,sdhci-brcmstb
      - items:
          - enum:
              - brcm,bcm74165b0-sdhci
              - brcm,bcm7445-sdhci
          - const: brcm,sdhci-brcmstb
      - items:
          - enum:
              - brcm,bcm7425-sdhci
          - const: brcm,sdhci-brcmstb

+3 −1
Original line number Diff line number Diff line
@@ -27,7 +27,9 @@ properties:
          - marvell,armada-ap806-sdhci

      - items:
          - const: marvell,armada-ap807-sdhci
          - enum:
              - marvell,armada-ap807-sdhci
              - marvell,ac5-sdhci
          - const: marvell,armada-ap806-sdhci

      - items:
+9 −0
Original line number Diff line number Diff line
@@ -145,6 +145,15 @@ properties:
    minimum: 0
    maximum: 7

  mediatek,tuning-step:
    $ref: /schemas/types.yaml#/definitions/uint32
    description:
      Some SoCs need extend tuning step for better delay value to avoid CRC issue.
      If not present, default tuning step is 32. For eMMC and SD, this can yield
      satisfactory calibration results in most cases.
    enum: [32, 64]
    default: 32

  resets:
    maxItems: 1

+1 −1
Original line number Diff line number Diff line
@@ -56,7 +56,7 @@ properties:
              - renesas,sdhi-r8a77980  # R-Car V3H
              - renesas,sdhi-r8a77990  # R-Car E3
              - renesas,sdhi-r8a77995  # R-Car D3
              - renesas,sdhi-r9a07g043 # RZ/G2UL
              - renesas,sdhi-r9a07g043 # RZ/G2UL and RZ/Five
              - renesas,sdhi-r9a07g044 # RZ/G2{L,LC}
              - renesas,sdhi-r9a07g054 # RZ/V2L
              - renesas,sdhi-r9a08g045 # RZ/G3S
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