Commit 20cbf8cb authored Nov 28, 2023 by Rahul Rameshbabu Committed by Saeed Mahameed Jan 24, 2024

net/mlx5: Use mlx5 device constant for selecting CQ period mode for ASO



mlx5 devices have specific constants for choosing the CQ period mode. These
constants do not have to match the constants used by the kernel software
API for DIM period mode selection.

Fixes: cdd04f4d ("net/mlx5: Add support to create SQ and CQ for ASO")
Signed-off-by: Rahul Rameshbabu <rrameshbabu@nvidia.com>
Reviewed-by: Jianbo Liu <jianbol@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>

parent 5b2a2523

drivers/net/ethernet/mellanox/mlx5/core/lib/aso.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -98,7 +98,7 @@ static int create_aso_cq(struct mlx5_aso_cq cq, void cqc_data)
		mlx5_fill_page_frag_array(&cq->wq_ctrl.buf,
		(__be64 *)MLX5_ADDR_OF(create_cq_in, in, pas));

		MLX5_SET(cqc, cqc, cq_period_mode, DIM_CQ_PERIOD_MODE_START_FROM_EQE);
		MLX5_SET(cqc, cqc, cq_period_mode, MLX5_CQ_PERIOD_MODE_START_FROM_EQE);
		MLX5_SET(cqc, cqc, c_eqn_or_apu_element, eqn);
		MLX5_SET(cqc, cqc, uar_page, mdev->priv.uar->index);
		MLX5_SET(cqc, cqc, log_page_size, cq->wq_ctrl.buf.page_shift -