Commit 210e04ff authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'pci-v5.18-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci 

Pull PCI fixes from Bjorn Helgaas:

 - Avoid putting Elo i2 PCIe Ports in D3cold because downstream devices
   are inaccessible after going back to D0 (Rafael J. Wysocki)

 - Qualcomm SM8250 has a ddrss_sf_tbu clock but SC8180X does not; make a
   SC8180X-specific config without the clock so it probes correctly
   (Bjorn Andersson)

 - Revert aardvark chained IRQ handler rewrite because it broke
   interrupt affinity (Pali Rohár)

* tag 'pci-v5.18-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
  Revert "PCI: aardvark: Rewrite IRQ code to chained IRQ handler"
  PCI: qcom: Remove ddrss_sf_tbu clock from SC8180X
  PCI/PM: Avoid putting Elo i2 PCIe Ports in D3cold
parents a1f37cd8 a3b69dd0

drivers/pci/controller/dwc/pcie-qcom.c

+6 −1
Original line number Diff line number Diff line
@@ -1550,6 +1550,11 @@ static const struct qcom_pcie_cfg sc7280_cfg = { 
	.pipe_clk_need_muxing = true,

};



static const struct qcom_pcie_cfg sc8180x_cfg = {

	.ops = &ops_1_9_0,

	.has_tbu_clk = true,

};



static const struct dw_pcie_ops dw_pcie_ops = {

	.link_up = qcom_pcie_link_up,

	.start_link = qcom_pcie_start_link,
@@ -1656,7 +1661,7 @@ static const struct of_device_id qcom_pcie_match[] = { 
	{ .compatible = "qcom,pcie-qcs404", .data = &ipq4019_cfg },

	{ .compatible = "qcom,pcie-sdm845", .data = &sdm845_cfg },

	{ .compatible = "qcom,pcie-sm8250", .data = &sm8250_cfg },

	{ .compatible = "qcom,pcie-sc8180x", .data = &sm8250_cfg },

	{ .compatible = "qcom,pcie-sc8180x", .data = &sc8180x_cfg },

	{ .compatible = "qcom,pcie-sm8450-pcie0", .data = &sm8450_pcie0_cfg },

	{ .compatible = "qcom,pcie-sm8450-pcie1", .data = &sm8450_pcie1_cfg },

	{ .compatible = "qcom,pcie-sc7280", .data = &sc7280_cfg },

drivers/pci/controller/pci-aardvark.c

+22 −26
Original line number Diff line number Diff line
@@ -272,7 +272,6 @@ struct advk_pcie { 
		u32 actions;

	} wins[OB_WIN_COUNT];

	u8 wins_count;

	int irq;

	struct irq_domain *rp_irq_domain;

	struct irq_domain *irq_domain;

	struct irq_chip irq_chip;
@@ -1570,26 +1569,21 @@ static void advk_pcie_handle_int(struct advk_pcie *pcie) 
	}

}



static void advk_pcie_irq_handler(struct irq_desc *desc)

static irqreturn_t advk_pcie_irq_handler(int irq, void *arg)

{

	struct advk_pcie *pcie = irq_desc_get_handler_data(desc);

	struct irq_chip *chip = irq_desc_get_chip(desc);

	u32 val, mask, status;

	struct advk_pcie *pcie = arg;

	u32 status;



	chained_irq_enter(chip, desc);

	status = advk_readl(pcie, HOST_CTRL_INT_STATUS_REG);

	if (!(status & PCIE_IRQ_CORE_INT))

		return IRQ_NONE;



	val = advk_readl(pcie, HOST_CTRL_INT_STATUS_REG);

	mask = advk_readl(pcie, HOST_CTRL_INT_MASK_REG);

	status = val & ((~mask) & PCIE_IRQ_ALL_MASK);



	if (status & PCIE_IRQ_CORE_INT) {

	advk_pcie_handle_int(pcie);



	/* Clear interrupt */

	advk_writel(pcie, PCIE_IRQ_CORE_INT, HOST_CTRL_INT_STATUS_REG);

	}



	chained_irq_exit(chip, desc);

	return IRQ_HANDLED;

}



static int advk_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
@@ -1669,7 +1663,7 @@ static int advk_pcie_probe(struct platform_device *pdev) 
	struct advk_pcie *pcie;

	struct pci_host_bridge *bridge;

	struct resource_entry *entry;

	int ret;

	int ret, irq;



	bridge = devm_pci_alloc_host_bridge(dev, sizeof(struct advk_pcie));

	if (!bridge)
@@ -1755,9 +1749,17 @@ static int advk_pcie_probe(struct platform_device *pdev) 
	if (IS_ERR(pcie->base))

		return PTR_ERR(pcie->base);



	pcie->irq = platform_get_irq(pdev, 0);

	if (pcie->irq < 0)

		return pcie->irq;

	irq = platform_get_irq(pdev, 0);

	if (irq < 0)

		return irq;



	ret = devm_request_irq(dev, irq, advk_pcie_irq_handler,

			       IRQF_SHARED | IRQF_NO_THREAD, "advk-pcie",

			       pcie);

	if (ret) {

		dev_err(dev, "Failed to register interrupt\n");

		return ret;

	}



	pcie->reset_gpio = devm_gpiod_get_from_of_node(dev, dev->of_node,

						       "reset-gpios", 0,
@@ -1814,15 +1816,12 @@ static int advk_pcie_probe(struct platform_device *pdev) 
		return ret;

	}



	irq_set_chained_handler_and_data(pcie->irq, advk_pcie_irq_handler, pcie);



	bridge->sysdata = pcie;

	bridge->ops = &advk_pcie_ops;

	bridge->map_irq = advk_pcie_map_irq;



	ret = pci_host_probe(bridge);

	if (ret < 0) {

		irq_set_chained_handler_and_data(pcie->irq, NULL, NULL);

		advk_pcie_remove_rp_irq_domain(pcie);

		advk_pcie_remove_msi_irq_domain(pcie);

		advk_pcie_remove_irq_domain(pcie);
@@ -1871,9 +1870,6 @@ static int advk_pcie_remove(struct platform_device *pdev) 
	advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_REG);

	advk_writel(pcie, PCIE_IRQ_ALL_MASK, HOST_CTRL_INT_STATUS_REG);



	/* Remove IRQ handler */

	irq_set_chained_handler_and_data(pcie->irq, NULL, NULL);



	/* Remove IRQ domains */

	advk_pcie_remove_rp_irq_domain(pcie);

	advk_pcie_remove_msi_irq_domain(pcie);

drivers/pci/pci.c

+10 −0
Original line number Diff line number Diff line
@@ -2920,6 +2920,16 @@ static const struct dmi_system_id bridge_d3_blacklist[] = { 
			DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),

			DMI_MATCH(DMI_BOARD_NAME, "X299 DESIGNARE EX-CF"),

		},

		/*

		 * Downstream device is not accessible after putting a root port

		 * into D3cold and back into D0 on Elo i2.

		 */

		.ident = "Elo i2",

		.matches = {

			DMI_MATCH(DMI_SYS_VENDOR, "Elo Touch Solutions"),

			DMI_MATCH(DMI_PRODUCT_NAME, "Elo i2"),

			DMI_MATCH(DMI_PRODUCT_VERSION, "RevB"),

		},

	},

#endif

	{ }