Commit 215b5309 authored by Yael Chemla's avatar Yael Chemla Committed by Jakub Kicinski
Browse files

net/mlx5: Fix 1600G link mode enum naming 



Rename TAUI/TBASE to GAUI/GBASE in 1600G link mode identifier and its
usage in ethtool and link-info tables.

Reported-by: default avatarDawid Osuchowski <dawid.osuchowski@linux.intel.com>
Signed-off-by: default avatarYael Chemla <ychemla@nvidia.com>
Reviewed-by: default avatarShahar Shitrit <shshitrit@nvidia.com>
Signed-off-by: default avatarTariq Toukan <tariqt@nvidia.com>
Reviewed-by: default avatarJacob Keller <jacob.e.keller@intel.com>
Reviewed-by: default avatarDawid Osuchowski <dawid.osuchowski@linux.intel.com>
Reported-by: default avatarDawid Osuchowski <dawid.osuchowski@linux.intel.com>
Signed-off-by: default avatarYael Chemla <ychemla@nvidia.com>
Reviewed-by: default avatarLeon Romanovsky <leonro@nvidia.com>
Link: https://patch.msgid.link/20260204194324.1723534-1-tariqt@nvidia.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent a182a62f

drivers/infiniband/hw/mlx5/main.c

+1 −1
Original line number Diff line number Diff line
@@ -511,7 +511,7 @@ static int translate_eth_ext_proto_oper(u32 eth_proto_oper, u16 *active_speed, 
		*active_width = IB_WIDTH_4X;

		*active_speed = IB_SPEED_XDR;

		break;

	case MLX5E_PROT_MASK(MLX5E_1600TAUI_8_1600TBASE_CR8_KR8):

	case MLX5E_PROT_MASK(MLX5E_1600GAUI_8_1600GBASE_CR8_KR8):

		*active_width = IB_WIDTH_8X;

		*active_speed = IB_SPEED_XDR;

		break;

drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c

+1 −1
Original line number Diff line number Diff line
@@ -261,7 +261,7 @@ void mlx5e_build_ptys2ethtool_map(void) 
				       ETHTOOL_LINK_MODE_800000baseDR4_2_Full_BIT,

				       ETHTOOL_LINK_MODE_800000baseSR4_Full_BIT,

				       ETHTOOL_LINK_MODE_800000baseVR4_Full_BIT);

	MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1600TAUI_8_1600TBASE_CR8_KR8, ext,

	MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1600GAUI_8_1600GBASE_CR8_KR8, ext,

				       ETHTOOL_LINK_MODE_1600000baseCR8_Full_BIT,

				       ETHTOOL_LINK_MODE_1600000baseKR8_Full_BIT,

				       ETHTOOL_LINK_MODE_1600000baseDR8_Full_BIT,

drivers/net/ethernet/mellanox/mlx5/core/port.c

+1 −1
Original line number Diff line number Diff line
@@ -1111,7 +1111,7 @@ mlx5e_ext_link_info[MLX5E_EXT_LINK_MODES_NUMBER] = { 
	[MLX5E_200GAUI_1_200GBASE_CR1_KR1]	= {.speed = 200000, .lanes = 1},

	[MLX5E_400GAUI_2_400GBASE_CR2_KR2]	= {.speed = 400000, .lanes = 2},

	[MLX5E_800GAUI_4_800GBASE_CR4_KR4]	= {.speed = 800000, .lanes = 4},

	[MLX5E_1600TAUI_8_1600TBASE_CR8_KR8]	= {.speed = 1600000, .lanes = 8},

	[MLX5E_1600GAUI_8_1600GBASE_CR8_KR8]	= {.speed = 1600000, .lanes = 8},

};



int mlx5_port_query_eth_proto(struct mlx5_core_dev *dev, u8 port, bool ext,

include/linux/mlx5/port.h

+1 −1
Original line number Diff line number Diff line
@@ -112,7 +112,7 @@ enum mlx5e_ext_link_mode { 
	MLX5E_400GAUI_2_400GBASE_CR2_KR2	= 17,

	MLX5E_800GAUI_8_800GBASE_CR8_KR8	= 19,

	MLX5E_800GAUI_4_800GBASE_CR4_KR4	= 20,

	MLX5E_1600TAUI_8_1600TBASE_CR8_KR8	= 23,

	MLX5E_1600GAUI_8_1600GBASE_CR8_KR8	= 23,

	MLX5E_EXT_LINK_MODES_NUMBER,

};