Commit 21612f52 authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Merge branch 'net-axienet-introduce-dmaengine' 

Radhey Shyam Pandey says:

====================
net: axienet: Introduce dmaengine

The axiethernet driver can use the dmaengine framework to communicate
with the xilinx DMAengine driver(AXIDMA, MCDMA). The inspiration behind
this dmaengine adoption is to reuse the in-kernel xilinx dma engine
driver[1] and remove redundant dma programming sequence[2] from the
ethernet driver. This simplifies the ethernet driver and also makes
it generic to be hooked to any complaint dma IP i.e AXIDMA, MCDMA
without any modification.

The dmaengine framework was extended for metadata API support during
the axidma RFC[3] discussion. However, it still needs further
enhancements to make it well suited for ethernet usecases.

Comments, suggestions, thoughts to implement remaining functional
features are very welcome!

[1]: https://github.com/torvalds/linux/blob/master/drivers/dma/xilinx/xilinx_dma.c
[2]: https://github.com/torvalds/linux/blob/master/drivers/net/ethernet/xilinx/xilinx_axienet_main.c#L238
[3]: http://lkml.iu.edu/hypermail/linux/kernel/1804.0/00367.html
[4]: https://lore.kernel.org/all/20221124102745.2620370-1-sarath.babu.naidu.gaddam@amd.com
====================

Link: https://lore.kernel.org/r/1700074613-1977070-1-git-send-email-radhey.shyam.pandey@amd.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parents a0bc96c0 6a91b846

Documentation/devicetree/bindings/net/xlnx,axi-ethernet.yaml

+16 −0
Original line number Diff line number Diff line
@@ -122,6 +122,20 @@ properties: 
      and "phy-handle" should point to an external PHY if exists.

    maxItems: 1



  dmas:

    minItems: 2

    maxItems: 32

    description: TX and RX DMA channel phandle



  dma-names:

    items:

      pattern: "^[tr]x_chan([0-9]|1[0-5])$"

    description:

      Should be "tx_chan0", "tx_chan1" ... "tx_chan15" for DMA Tx channel

      Should be "rx_chan0", "rx_chan1" ... "rx_chan15" for DMA Rx channel

    minItems: 2

    maxItems: 32



required:

  - compatible

  - interrupts
@@ -143,6 +157,8 @@ examples: 
        clocks = <&axi_clk>, <&axi_clk>, <&pl_enet_ref_clk>, <&mgt_clk>;

        phy-mode = "mii";

        reg = <0x40c00000 0x40000>,<0x50c00000 0x40000>;

        dmas = <&xilinx_dma 0>, <&xilinx_dma 1>;

        dma-names = "tx_chan0", "rx_chan0";

        xlnx,rxcsum = <0x2>;

        xlnx,rxmem = <0x800>;

        xlnx,txcsum = <0x2>;

drivers/net/ethernet/xilinx/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ config XILINX_EMACLITE 
config XILINX_AXI_EMAC

	tristate "Xilinx 10/100/1000 AXI Ethernet support"

	depends on HAS_IOMEM

	depends on XILINX_DMA

	select PHYLINK

	help

	  This driver supports the 10/100/1000 Ethernet from Xilinx for the

drivers/net/ethernet/xilinx/xilinx_axienet.h

+35 −0
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@ 
#include <linux/interrupt.h>

#include <linux/if_vlan.h>

#include <linux/phylink.h>

#include <linux/skbuff.h>



/* Packet size info */

#define XAE_HDR_SIZE			14 /* Size of Ethernet header */
@@ -378,6 +379,22 @@ struct axidma_bd { 


#define XAE_NUM_MISC_CLOCKS 3



/**

 * struct skbuf_dma_descriptor - skb for each dma descriptor

 * @sgl: Pointer for sglist.

 * @desc: Pointer to dma descriptor.

 * @dma_address: dma address of sglist.

 * @skb: Pointer to SKB transferred using DMA

 * @sg_len: number of entries in the sglist.

 */

struct skbuf_dma_descriptor {

	struct scatterlist sgl[MAX_SKB_FRAGS + 1];

	struct dma_async_tx_descriptor *desc;

	dma_addr_t dma_address;

	struct sk_buff *skb;

	int sg_len;

};



/**

 * struct axienet_local - axienet private per device data

 * @ndev:	Pointer for net_device to which it will be attached.
@@ -435,6 +452,15 @@ struct axidma_bd { 
 * @coalesce_usec_rx:	IRQ coalesce delay for RX

 * @coalesce_count_tx:	Store the irq coalesce on TX side.

 * @coalesce_usec_tx:	IRQ coalesce delay for TX

 * @use_dmaengine: flag to check dmaengine framework usage.

 * @tx_chan:	TX DMA channel.

 * @rx_chan:	RX DMA channel.

 * @tx_skb_ring: Pointer to TX skb ring buffer array.

 * @rx_skb_ring: Pointer to RX skb ring buffer array.

 * @tx_ring_head: TX skb ring buffer head index.

 * @tx_ring_tail: TX skb ring buffer tail index.

 * @rx_ring_head: RX skb ring buffer head index.

 * @rx_ring_tail: RX skb ring buffer tail index.

 */

struct axienet_local {

	struct net_device *ndev;
@@ -499,6 +525,15 @@ struct axienet_local { 
	u32 coalesce_usec_rx;

	u32 coalesce_count_tx;

	u32 coalesce_usec_tx;

	u8  use_dmaengine;

	struct dma_chan *tx_chan;

	struct dma_chan *rx_chan;

	struct skbuf_dma_descriptor **tx_skb_ring;

	struct skbuf_dma_descriptor **rx_skb_ring;

	int tx_ring_head;

	int tx_ring_tail;

	int rx_ring_head;

	int rx_ring_tail;

};



/**

drivers/net/ethernet/xilinx/xilinx_axienet_main.c

+546 −121

File changed.

Preview size limit exceeded, changes collapsed.