Commit 2184dbcd authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'soc-drivers-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 

Pull ARM SoC driver updates from Arnd Bergmann:
 "This is the usual mix of updates for drivers that are used on (mostly
  ARM) SoCs with no other top-level subsystem tree, including:

   - The SCMI firmware subsystem gains support for version 3.2 of the
     specification and updates to the notification code

   - Feature updates for Tegra and Qualcomm platforms for added hardware
     support

   - A number of platforms get soc_device additions for identifying
     newly added chips from Renesas, Qualcomm, Mediatek and Google

   - Trivial improvements for firmware and memory drivers amongst
     others, in particular 'const' annotations throughout multiple
     subsystems"

* tag 'soc-drivers-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (96 commits)
  tee: make tee_bus_type const
  soc: qcom: aoss: add missing kerneldoc for qmp members
  soc: qcom: geni-se: drop unused kerneldoc struct geni_wrapper param
  soc: qcom: spm: fix building with CONFIG_REGULATOR=n
  bus: ti-sysc: constify the struct device_type usage
  memory: stm32-fmc2-ebi: keep power domain on
  memory: stm32-fmc2-ebi: add MP25 RIF support
  memory: stm32-fmc2-ebi: add MP25 support
  memory: stm32-fmc2-ebi: check regmap_read return value
  dt-bindings: memory-controller: st,stm32: add MP25 support
  dt-bindings: bus: imx-weim: convert to YAML
  watchdog: s3c2410_wdt: use exynos_get_pmu_regmap_by_phandle() for PMU regs
  soc: samsung: exynos-pmu: Add regmap support for SoCs that protect PMU regs
  MAINTAINERS: Update SCMI entry with HWMON driver
  MAINTAINERS: samsung: gs101: match patches touching Google Tensor SoC
  memory: tegra: Fix indentation
  memory: tegra: Add BPMP and ICC info for DLA clients
  memory: tegra: Correct DLA client names
  dt-bindings: memory: renesas,rpc-if: Document R-Car V4M support
  firmware: arm_scmi: Update the supported clock protocol version
  ...
parents 306bee64 049238d2

Documentation/devicetree/bindings/arm/msm/qcom,saw2.txt

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SPM AVS Wrapper 2 (SAW2)



The SAW2 is a wrapper around the Subsystem Power Manager (SPM) and the

Adaptive Voltage Scaling (AVS) hardware. The SPM is a programmable

power-controller that transitions a piece of hardware (like a processor or

subsystem) into and out of low power modes via a direct connection to

the PMIC. It can also be wired up to interact with other processors in the

system, notifying them when a low power state is entered or exited.



Multiple revisions of the SAW hardware are supported using these Device Nodes.

SAW2 revisions differ in the register offset and configuration data. Also, the

same revision of the SAW in different SoCs may have different configuration

data due the differences in hardware capabilities. Hence the SoC name, the

version of the SAW hardware in that SoC and the distinction between cpu (big

or Little) or cache, may be needed to uniquely identify the SAW register

configuration and initialization data. The compatible string is used to

indicate this parameter.



PROPERTIES



- compatible:

	Usage: required

	Value type: <string>

	Definition: Must have

			"qcom,saw2"

		    A more specific value could be one of:

			"qcom,apq8064-saw2-v1.1-cpu"

			"qcom,msm8226-saw2-v2.1-cpu"

			"qcom,msm8974-saw2-v2.1-cpu"

			"qcom,apq8084-saw2-v2.1-cpu"



- reg:

	Usage: required

	Value type: <prop-encoded-array>

	Definition: the first element specifies the base address and size of

		    the register region. An optional second element specifies

		    the base address and size of the alias register region.



- regulator:

	Usage: optional

	Value type: boolean

	Definition: Indicates that this SPM device acts as a regulator device

			device for the core (CPU or Cache) the SPM is attached

			to.



Example 1:



	power-controller@2099000 {

		compatible = "qcom,saw2";

		reg = <0x02099000 0x1000>, <0x02009000 0x1000>;

		regulator;

	};



Example 2:

	saw0: power-controller@f9089000 {

		compatible = "qcom,apq8084-saw2-v2.1-cpu", "qcom,saw2";

		reg = <0xf9089000 0x1000>, <0xf9009000 0x1000>;

	};

Documentation/devicetree/bindings/bus/imx-weim.txt

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Device tree bindings for i.MX Wireless External Interface Module (WEIM)



The term "wireless" does not imply that the WEIM is literally an interface

without wires. It simply means that this module was originally designed for

wireless and mobile applications that use low-power technology.



The actual devices are instantiated from the child nodes of a WEIM node.



Required properties:



 - compatible:		Should contain one of the following:

			  "fsl,imx1-weim"

			  "fsl,imx27-weim"

			  "fsl,imx51-weim"

			  "fsl,imx50-weim"

			  "fsl,imx6q-weim"

 - reg:			A resource specifier for the register space

			(see the example below)

 - clocks:		the clock, see the example below.

 - #address-cells:	Must be set to 2 to allow memory address translation

 - #size-cells:		Must be set to 1 to allow CS address passing

 - ranges:		Must be set up to reflect the memory layout with four

			integer values for each chip-select line in use:



			   <cs-number> 0 <physical address of mapping> <size>



Optional properties:



 - fsl,weim-cs-gpr:	For "fsl,imx50-weim" and "fsl,imx6q-weim" type of

			devices, it should be the phandle to the system General

			Purpose Register controller that contains WEIM CS GPR

			register, e.g. IOMUXC_GPR1 on i.MX6Q.  IOMUXC_GPR1[11:0]

			should be set up as one of the following 4 possible

			values depending on the CS space configuration.



			IOMUXC_GPR1[11:0]    CS0    CS1    CS2    CS3

			---------------------------------------------

				05	    128M     0M     0M     0M

				033          64M    64M     0M     0M

				0113         64M    32M    32M     0M

				01111        32M    32M    32M    32M



			In case that the property is absent, the reset value or

			what bootloader sets up in IOMUXC_GPR1[11:0] will be

			used.



 - fsl,burst-clk-enable	For "fsl,imx50-weim" and "fsl,imx6q-weim" type of

			devices, the presence of this property indicates that

			the weim bus should operate in Burst Clock Mode.



 - fsl,continuous-burst-clk	Make Burst Clock to output continuous clock.

			Without this option Burst Clock will output clock

			only when necessary. This takes effect only if

			"fsl,burst-clk-enable" is set.



Timing property for child nodes. It is mandatory, not optional.



 - fsl,weim-cs-timing:	The timing array, contains timing values for the

			child node. We get the CS indexes from the address

			ranges in the child node's "reg" property.

			The number of registers depends on the selected chip:

			For i.MX1, i.MX21 ("fsl,imx1-weim") there are two

			registers: CSxU, CSxL.

			For i.MX25, i.MX27, i.MX31 and i.MX35 ("fsl,imx27-weim")

			there are three registers: CSCRxU, CSCRxL, CSCRxA.

			For i.MX50, i.MX53 ("fsl,imx50-weim"),

			i.MX51 ("fsl,imx51-weim") and i.MX6Q ("fsl,imx6q-weim")

			there are six registers: CSxGCR1, CSxGCR2, CSxRCR1,

			CSxRCR2, CSxWCR1, CSxWCR2.



Example for an imx6q-sabreauto board, the NOR flash connected to the WEIM:



	weim: weim@21b8000 {

		compatible = "fsl,imx6q-weim";

		reg = <0x021b8000 0x4000>;

		clocks = <&clks 196>;

		#address-cells = <2>;

		#size-cells = <1>;

		ranges = <0 0 0x08000000 0x08000000>;

		fsl,weim-cs-gpr = <&gpr>;



		nor@0,0 {

			compatible = "cfi-flash";

			reg = <0 0 0x02000000>;

			#address-cells = <1>;

			#size-cells = <1>;

			bank-width = <2>;

			fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000

					0x0000c000 0x1404a38e 0x00000000>;

		};

	};



Example for an imx6q-based board, a multi-chipselect device connected to WEIM:



In this case, both chip select 0 and 1 will be configured with the same timing

array values.



	weim: weim@21b8000 {

		compatible = "fsl,imx6q-weim";

		reg = <0x021b8000 0x4000>;

		clocks = <&clks 196>;

		#address-cells = <2>;

		#size-cells = <1>;

		ranges = <0 0 0x08000000 0x02000000

			  1 0 0x0a000000 0x02000000

			  2 0 0x0c000000 0x02000000

			  3 0 0x0e000000 0x02000000>;

		fsl,weim-cs-gpr = <&gpr>;



		acme@0 {

			compatible = "acme,whatever";

			reg = <0 0 0x100>, <0 0x400000 0x800>,

				<1 0x400000 0x800>;

			fsl,weim-cs-timing = <0x024400b1 0x00001010 0x20081100

				0x00000000 0xa0000240 0x00000000>;

		};

	};

Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml

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@@ -33,6 +33,7 @@ properties: 
          - const: samsung,exynos7-hsi2c

      - items:

          - enum:

              - google,gs101-hsi2c

              - samsung,exynos850-hsi2c

          - const: samsung,exynosautov9-hsi2c

      - const: samsung,exynos5-hsi2c    # Exynos5250 and Exynos5420

Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim-peripherals.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,imx-weim-peripherals.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: i.MX WEIM Bus Peripheral Nodes



maintainers:

  - Shawn Guo <shawnguo@kernel.org>

  - Sascha Hauer <s.hauer@pengutronix.de>



description:

  This binding is meant for the child nodes of the WEIM node. The node

  represents any device connected to the WEIM bus. It may be a Flash chip,

  RAM chip or Ethernet controller, etc. These properties are meant for

  configuring the WEIM settings/timings and will accompany the bindings

  supported by the respective device.



properties:

  reg: true



  fsl,weim-cs-timing:

    $ref: /schemas/types.yaml#/definitions/uint32-array

    description:

      Timing values for the child node.

    minItems: 2

    maxItems: 6



# the WEIM child will have its own native properties

additionalProperties: true

Documentation/devicetree/bindings/memory-controllers/fsl/fsl,imx-weim.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,imx-weim.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: i.MX Wireless External Interface Module (WEIM)



maintainers:

  - Shawn Guo <shawnguo@kernel.org>

  - Sascha Hauer <s.hauer@pengutronix.de>



description:

  The term "wireless" does not imply that the WEIM is literally an interface

  without wires. It simply means that this module was originally designed for

  wireless and mobile applications that use low-power technology. The actual

  devices are instantiated from the child nodes of a WEIM node.



properties:

  $nodename:

    pattern: "^memory-controller@[0-9a-f]+$"



  compatible:

    oneOf:

      - enum:

          - fsl,imx1-weim

          - fsl,imx27-weim

          - fsl,imx50-weim

          - fsl,imx51-weim

          - fsl,imx6q-weim

      - items:

          - enum:

              - fsl,imx31-weim

              - fsl,imx35-weim

          - const: fsl,imx27-weim

      - items:

          - enum:

              - fsl,imx6sx-weim

              - fsl,imx6ul-weim

          - const: fsl,imx6q-weim



  "#address-cells":

    const: 2



  "#size-cells":

    const: 1



  reg:

    maxItems: 1



  clocks:

    maxItems: 1



  interrupts:

    maxItems: 1



  ranges: true



  fsl,weim-cs-gpr:

    $ref: /schemas/types.yaml#/definitions/phandle

    description: |

      Phandle to the system General Purpose Register controller that contains

      WEIM CS GPR register, e.g. IOMUXC_GPR1 on i.MX6Q. IOMUXC_GPR1[11:0]

      should be set up as one of the following 4 possible values depending on

      the CS space configuration.



      IOMUXC_GPR1[11:0]    CS0    CS1    CS2    CS3

      ---------------------------------------------

              05          128M     0M     0M     0M

              033          64M    64M     0M     0M

              0113         64M    32M    32M     0M

              01111        32M    32M    32M    32M



      In case that the property is absent, the reset value or what bootloader

      sets up in IOMUXC_GPR1[11:0] will be used.



  fsl,burst-clk-enable:

    type: boolean

    description:

      The presence of this property indicates that the weim bus should operate

      in Burst Clock Mode.



  fsl,continuous-burst-clk:

    type: boolean

    description:

      Make Burst Clock to output continuous clock. Without this option Burst

      Clock will output clock only when necessary.



patternProperties:

  "^.*@[0-7],[0-9a-f]+$":

    type: object

    description: Devices attached to chip selects are represented as subnodes.

    $ref: fsl,imx-weim-peripherals.yaml

    additionalProperties: true

    required:

      - fsl,weim-cs-timing



required:

  - compatible

  - reg

  - clocks

  - "#address-cells"

  - "#size-cells"

  - ranges



allOf:

  - if:

      properties:

        compatible:

          not:

            contains:

              enum:

                - fsl,imx50-weim

                - fsl,imx6q-weim

    then:

      properties:

        fsl,weim-cs-gpr: false

        fsl,burst-clk-enable: false

  - if:

      not:

        required:

          - fsl,burst-clk-enable

    then:

      properties:

        fsl,continuous-burst-clk: false

  - if:

      properties:

        compatible:

          contains:

            const: fsl,imx1-weim

    then:

      patternProperties:

        "^.*@[0-7],[0-9a-f]+$":

          properties:

            fsl,weim-cs-timing:

              items:

                items:

                  - description: CSxU

                  - description: CSxL

  - if:

      properties:

        compatible:

          contains:

            enum:

              - fsl,imx27-weim

              - fsl,imx31-weim

              - fsl,imx35-weim

    then:

      patternProperties:

        "^.*@[0-7],[0-9a-f]+$":

          properties:

            fsl,weim-cs-timing:

              items:

                items:

                  - description: CSCRxU

                  - description: CSCRxL

                  - description: CSCRxA

  - if:

      properties:

        compatible:

          contains:

            enum:

              - fsl,imx50-weim

              - fsl,imx51-weim

              - fsl,imx6q-weim

              - fsl,imx6sx-weim

              - fsl,imx6ul-weim

    then:

      patternProperties:

        "^.*@[0-7],[0-9a-f]+$":

          properties:

            fsl,weim-cs-timing:

              items:

                items:

                  - description: CSxGCR1

                  - description: CSxGCR2

                  - description: CSxRCR1

                  - description: CSxRCR2

                  - description: CSxWCR1

                  - description: CSxWCR2



additionalProperties: false



examples:

  - |

    memory-controller@21b8000 {

        compatible = "fsl,imx6q-weim";

        reg = <0x021b8000 0x4000>;

        clocks = <&clks 196>;

        #address-cells = <2>;

        #size-cells = <1>;

        ranges = <0 0 0x08000000 0x08000000>;

        fsl,weim-cs-gpr = <&gpr>;



        flash@0,0 {

            compatible = "cfi-flash";

            reg = <0 0 0x02000000>;

            #address-cells = <1>;

            #size-cells = <1>;

            bank-width = <2>;

            fsl,weim-cs-timing = <0x00620081 0x00000001 0x1c022000

                                  0x0000c000 0x1404a38e 0x00000000>;

        };

    };