Commit 218ea310 authored by Michael Ellerman's avatar Michael Ellerman
Browse files

Merge branch 'fixes' into next 

Merge our fixes branch, a few of them are tripping people up while
working on top of next, and we also have a dependency between the CXL
fixes and new CXL code we want to merge into next.
parents 5405c92b d6bd8194

Documentation/admin-guide/kernel-parameters.txt

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@@ -866,6 +866,15 @@ 


	dscc4.setup=	[NET]



	dt_cpu_ftrs=	[PPC]

			Format: {"off" | "known"}

			Control how the dt_cpu_ftrs device-tree binding is

			used for CPU feature discovery and setup (if it

			exists).

			off: Do not use it, fall back to legacy cpu table.

			known: Do not pass through unknown features to guests

			or userspace, only those that the kernel is aware of.



	dump_apple_properties	[X86]

			Dump name and content of EFI device properties on

			x86 Macs.  Useful for driver authors to determine

arch/powerpc/Kconfig

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@@ -374,22 +374,6 @@ source "arch/powerpc/platforms/Kconfig" 


menu "Kernel options"



config PPC_DT_CPU_FTRS

	bool "Device-tree based CPU feature discovery & setup"

	depends on PPC_BOOK3S_64

	default n

	help

	  This enables code to use a new device tree binding for describing CPU

	  compatibility and features. Saying Y here will attempt to use the new

	  binding if the firmware provides it. Currently only the skiboot

	  firmware provides this binding.

	  If you're not sure say Y.



config PPC_CPUFEATURES_ENABLE_UNKNOWN

	bool "cpufeatures pass through unknown features to guest/userspace"

	depends on PPC_DT_CPU_FTRS

	default y



config HIGHMEM

	bool "High memory support"

	depends on PPC32

arch/powerpc/include/asm/book3s/64/hash-4k.h

+1 −1
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@@ -8,7 +8,7 @@ 
#define H_PTE_INDEX_SIZE  9

#define H_PMD_INDEX_SIZE  7

#define H_PUD_INDEX_SIZE  9

#define H_PGD_INDEX_SIZE  12

#define H_PGD_INDEX_SIZE  9



#ifndef __ASSEMBLY__

#define H_PTE_TABLE_SIZE	(sizeof(pte_t) << H_PTE_INDEX_SIZE)

arch/powerpc/include/asm/bug.h

+1 −1
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@@ -104,7 +104,7 @@ 
		"1:	"PPC_TLNEI"	%4,0\n"			\

		_EMIT_BUG_ENTRY					\

		: : "i" (__FILE__), "i" (__LINE__),		\

		  "i" (BUGFLAG_TAINT(TAINT_WARN)),		\

		  "i" (BUGFLAG_WARNING|BUGFLAG_TAINT(TAINT_WARN)),\

		  "i" (sizeof(struct bug_entry)),		\

		  "r" (__ret_warn_on));				\

	}							\

arch/powerpc/include/asm/cputable.h

+1 −2
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@@ -214,7 +214,6 @@ enum { 
#define CPU_FTR_DAWR			LONG_ASM_CONST(0x0400000000000000)

#define CPU_FTR_DABRX			LONG_ASM_CONST(0x0800000000000000)

#define CPU_FTR_PMAO_BUG		LONG_ASM_CONST(0x1000000000000000)

#define CPU_FTR_SUBCORE			LONG_ASM_CONST(0x2000000000000000)

#define CPU_FTR_POWER9_DD1		LONG_ASM_CONST(0x4000000000000000)



#ifndef __ASSEMBLY__
@@ -463,7 +462,7 @@ enum { 
	    CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \

	    CPU_FTR_ICSWX | CPU_FTR_CFAR | CPU_FTR_HVMODE | CPU_FTR_VMX_COPY | \

	    CPU_FTR_DBELL | CPU_FTR_HAS_PPR | CPU_FTR_DAWR | \

	    CPU_FTR_ARCH_207S | CPU_FTR_TM_COMP | CPU_FTR_SUBCORE)

	    CPU_FTR_ARCH_207S | CPU_FTR_TM_COMP)

#define CPU_FTRS_POWER8E (CPU_FTRS_POWER8 | CPU_FTR_PMAO_BUG)

#define CPU_FTRS_POWER8_DD1 (CPU_FTRS_POWER8 & ~CPU_FTR_DBELL)

#define CPU_FTRS_POWER9 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \