Unverified Commit 21e28a07 authored by Rafał Miłecki's avatar Rafał Miłecki Committed by AngeloGioacchino Del Regno
Browse files

arm64: dts: mediatek: mt7988: add UART controllers 



MT7988 has three on-SoC UART controllers that support M16C450 and
M16550A modes.

Signed-off-by: default avatarRafał Miłecki <rafal@milecki.pl>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240605085433.26513-2-zajec5@gmail.com


Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
parent 0fd4ffc8

arch/arm64/boot/dts/mediatek/mt7988a.dtsi

+34 −1
Original line number Diff line number Diff line
@@ -86,7 +86,7 @@ infracfg: clock-controller@10001000 { 
			#clock-cells = <1>;

		};



		clock-controller@1001b000 {

		topckgen: clock-controller@1001b000 {

			compatible = "mediatek,mt7988-topckgen", "syscon";

			reg = <0 0x1001b000 0 0x1000>;

			#clock-cells = <1>;
@@ -124,6 +124,39 @@ pwm@10048000 { 
			status = "disabled";

		};



		serial@11000000 {

			compatible = "mediatek,mt7988-uart", "mediatek,mt6577-uart";

			reg = <0 0x11000000 0 0x100>;

			interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "uart", "wakeup";

			clocks = <&topckgen CLK_TOP_UART_SEL>,

				 <&infracfg CLK_INFRA_52M_UART0_CK>;

			clock-names = "baud", "bus";

			status = "disabled";

		};



		serial@11000100 {

			compatible = "mediatek,mt7988-uart", "mediatek,mt6577-uart";

			reg = <0 0x11000100 0 0x100>;

			interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "uart", "wakeup";

			clocks = <&topckgen CLK_TOP_UART_SEL>,

				 <&infracfg CLK_INFRA_52M_UART1_CK>;

			clock-names = "baud", "bus";

			status = "disabled";

		};



		serial@11000200 {

			compatible = "mediatek,mt7988-uart", "mediatek,mt6577-uart";

			reg = <0 0x11000200 0 0x100>;

			interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "uart", "wakeup";

			clocks = <&topckgen CLK_TOP_UART_SEL>,

				 <&infracfg CLK_INFRA_52M_UART2_CK>;

			clock-names = "baud", "bus";

			status = "disabled";

		};



		i2c@11003000 {

			compatible = "mediatek,mt7981-i2c";

			reg = <0 0x11003000 0 0x1000>,