Commit 22228b93 authored by Fabrizio Castro's avatar Fabrizio Castro Committed by Vinod Koul
Browse files

dt-bindings: dma: rz-dmac: Document RZ/V2H(P) family of SoCs 



Document the Renesas RZ/V2H(P) family of SoCs DMAC block.
The Renesas RZ/V2H(P) DMAC is very similar to the one found on the
Renesas RZ/G2L family of SoCs, but there are some differences:
* It only uses one register area
* It only uses one clock
* It only uses one reset
* Instead of using MID/IRD it uses REQ No
* It is connected to the Interrupt Control Unit (ICU)

Signed-off-by: default avatarFabrizio Castro <fabrizio.castro.jz@renesas.com>
Acked-by: default avatarConor Dooley <conor.dooley@microchip.com>
Reviewed-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: default avatarRob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250423143422.3747702-3-fabrizio.castro.jz@renesas.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent ec52f10a

Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml

+82 −19
Original line number Diff line number Diff line
@@ -11,7 +11,8 @@ maintainers: 


properties:

  compatible:

    items:

    oneOf:

      - items:

          - enum:

              - renesas,r7s72100-dmac # RZ/A1H

              - renesas,r9a07g043-dmac # RZ/G2UL and RZ/Five
@@ -20,10 +21,13 @@ properties: 
              - renesas,r9a08g045-dmac # RZ/G3S

          - const: renesas,rz-dmac



      - const: renesas,r9a09g057-dmac # RZ/V2H(P)



  reg:

    items:

      - description: Control and channel register block

      - description: DMA extended resource selector block

    minItems: 1



  interrupts:

    maxItems: 17
@@ -52,6 +56,7 @@ properties: 
    items:

      - description: DMA main clock

      - description: DMA register access clock

    minItems: 1



  clock-names:

    items:
@@ -61,10 +66,10 @@ properties: 
  '#dma-cells':

    const: 1

    description:

      The cell specifies the encoded MID/RID values of the DMAC port

      connected to the DMA client and the slave channel configuration

      parameters.

      bits[0:9] - Specifies MID/RID value

      The cell specifies the encoded MID/RID or the REQ No values of

      the DMAC port connected to the DMA client and the slave channel

      configuration parameters.

      bits[0:9] - Specifies the MID/RID or the REQ No value

      bit[10] - Specifies DMA request high enable (HIEN)

      bit[11] - Specifies DMA request detection type (LVL)

      bits[12:14] - Specifies DMAACK output mode (AM)
@@ -80,12 +85,26 @@ properties: 
    items:

      - description: Reset for DMA ARESETN reset terminal

      - description: Reset for DMA RST_ASYNC reset terminal

    minItems: 1



  reset-names:

    items:

      - const: arst

      - const: rst_async



  renesas,icu:

    description:

      It must contain the phandle to the ICU and the index of the DMAC as seen

      from the ICU.

    $ref: /schemas/types.yaml#/definitions/phandle-array

    items:

      - items:

          - description: Phandle to the ICU node.

          - description:

              The number of the DMAC as seen from the ICU, i.e. parameter k from

              register ICU_DMkSELy. This may differ from the actual DMAC instance

              number.



required:

  - compatible

  - reg
@@ -98,13 +117,25 @@ allOf: 
  - $ref: dma-controller.yaml#



  - if:

      not:

      properties:

        compatible:

          contains:

            enum:

                - renesas,r7s72100-dmac

              - renesas,r9a07g043-dmac

              - renesas,r9a07g044-dmac

              - renesas,r9a07g054-dmac

              - renesas,r9a08g045-dmac

    then:

      properties:

        reg:

          minItems: 2

        clocks:

          minItems: 2

        resets:

          minItems: 2



        renesas,icu: false



      required:

        - clocks

        - clock-names
@@ -112,13 +143,45 @@ allOf: 
        - resets

        - reset-names



    else:

  - if:

      properties:

        compatible:

          contains:

            const: renesas,r7s72100-dmac

    then:

      properties:

        reg:

          minItems: 2



        clocks: false

        clock-names: false

        power-domains: false

        resets: false

        reset-names: false

        renesas,icu: false



  - if:

      properties:

        compatible:

          contains:

            const: renesas,r9a09g057-dmac

    then:

      properties:

        reg:

          maxItems: 1

        clocks:

          maxItems: 1

        resets:

          maxItems: 1



        clock-names: false

        reset-names: false



      required:

        - clocks

        - power-domains

        - renesas,icu

        - resets



additionalProperties: false