Commit 222a4eea authored by Geetha sowjanya's avatar Geetha sowjanya Committed by David S. Miller
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octeontx2-pf: RVU representor driver 



Adds basic driver for the RVU representor.

Driver on probe does pci specific initialization and
does hw resources configuration. Introduces RVU_ESWITCH
kernel config to enable/disable the driver. Representor
and NIC shares the code but representors netdev support
subset of NIC functionality. Hence "otx2_rep_dev" API
helps to skip the features initialization that are not
supported by the representors.

Signed-off-by: default avatarGeetha sowjanya <gakula@marvell.com>
Reviewed-by: default avatarSimon Horman <horms@kernel.org>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent ef04d290

drivers/net/ethernet/marvell/octeontx2/Kconfig

+8 −0
Original line number Diff line number Diff line
@@ -46,3 +46,11 @@ config OCTEONTX2_VF 
	depends on OCTEONTX2_PF

	help

	  This driver supports Marvell's OcteonTX2 NIC virtual function.



config RVU_ESWITCH

	tristate "Marvell RVU E-Switch support"

	depends on OCTEONTX2_PF

	default m

	help

	  This driver supports Marvell's RVU E-Switch that

	  provides internal SRIOV packet steering and switching.

drivers/net/ethernet/marvell/octeontx2/af/Makefile

+2 −1
Original line number Diff line number Diff line
@@ -11,4 +11,5 @@ rvu_mbox-y := mbox.o rvu_trace.o 
rvu_af-y := cgx.o rvu.o rvu_cgx.o rvu_npa.o rvu_nix.o \

		  rvu_reg.o rvu_npc.o rvu_debugfs.o ptp.o rvu_npc_fs.o \

		  rvu_cpt.o rvu_devlink.o rpm.o rvu_cn10k.o rvu_switch.o \

		  rvu_sdp.o rvu_npc_hash.o mcs.o mcs_rvu_if.o mcs_cnf10kb.o
 
		  rvu_sdp.o rvu_npc_hash.o mcs.o mcs_rvu_if.o mcs_cnf10kb.o \

		  rvu_rep.o

drivers/net/ethernet/marvell/octeontx2/af/mbox.h

+8 −0
Original line number Diff line number Diff line
@@ -144,6 +144,7 @@ M(LMTST_TBL_SETUP, 0x00a, lmtst_tbl_setup, lmtst_tbl_setup_req, \ 
				msg_rsp)				\

M(SET_VF_PERM,		0x00b, set_vf_perm, set_vf_perm, msg_rsp)	\

M(PTP_GET_CAP,		0x00c, ptp_get_cap, msg_req, ptp_get_cap_rsp)	\

M(GET_REP_CNT,		0x00d, get_rep_cnt, msg_req, get_rep_cnt_rsp)	\

/* CGX mbox IDs (range 0x200 - 0x3FF) */				\

M(CGX_START_RXTX,	0x200, cgx_start_rxtx, msg_req, msg_rsp)	\

M(CGX_STOP_RXTX,	0x201, cgx_stop_rxtx, msg_req, msg_rsp)		\
@@ -1525,6 +1526,13 @@ struct ptp_get_cap_rsp { 
	u64 cap;

};



struct get_rep_cnt_rsp {

	struct mbox_msghdr hdr;

	u16 rep_cnt;

	u16 rep_pf_map[64];

	u64 rsvd;

};



struct flow_msg {

	unsigned char dmac[6];

	unsigned char smac[6];

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

+11 −0
Original line number Diff line number Diff line
@@ -595,6 +595,9 @@ struct rvu { 
	spinlock_t		cpt_intr_lock;



	struct mutex		mbox_lock; /* Serialize mbox up and down msgs */

	u16			rep_pcifunc;

	int			rep_cnt;

	u16			*rep2pfvf_map;

};



static inline void rvu_write64(struct rvu *rvu, u64 block, u64 offset, u64 val)
@@ -853,6 +856,14 @@ bool is_sdp_pfvf(u16 pcifunc); 
bool is_sdp_pf(u16 pcifunc);

bool is_sdp_vf(struct rvu *rvu, u16 pcifunc);



static inline bool is_rep_dev(struct rvu *rvu, u16 pcifunc)

{

	if (rvu->rep_pcifunc && rvu->rep_pcifunc == pcifunc)

		return true;



	return false;

}



/* CGX APIs */

static inline bool is_pf_cgxmapped(struct rvu *rvu, u8 pf)

{

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c

+19 −3
Original line number Diff line number Diff line
@@ -31,6 +31,7 @@ static int nix_free_all_bandprof(struct rvu *rvu, u16 pcifunc); 
static void nix_clear_ratelimit_aggr(struct rvu *rvu, struct nix_hw *nix_hw,

				     u32 leaf_prof);

static const char *nix_get_ctx_name(int ctype);

static int nix_get_tx_link(struct rvu *rvu, u16 pcifunc);



enum mc_tbl_sz {

	MC_TBL_SZ_256,
@@ -312,7 +313,9 @@ static bool is_valid_txschq(struct rvu *rvu, int blkaddr, 


	/* TLs aggegating traffic are shared across PF and VFs */

	if (lvl >= hw->cap.nix_tx_aggr_lvl) {

		if (rvu_get_pf(map_func) != rvu_get_pf(pcifunc))

		if ((nix_get_tx_link(rvu, map_func) !=

		     nix_get_tx_link(rvu, pcifunc)) &&

		     (rvu_get_pf(map_func) != rvu_get_pf(pcifunc)))

			return false;

		else

			return true;
@@ -1614,6 +1617,12 @@ int rvu_mbox_handler_nix_lf_alloc(struct rvu *rvu, 
	cfg = NPC_TX_DEF_PKIND;

	rvu_write64(rvu, blkaddr, NIX_AF_LFX_TX_PARSE_CFG(nixlf), cfg);



	if (is_rep_dev(rvu, pcifunc)) {

		pfvf->tx_chan_base = RVU_SWITCH_LBK_CHAN;

		pfvf->tx_chan_cnt = 1;

		goto exit;

	}



	intf = is_lbk_vf(rvu, pcifunc) ? NIX_INTF_TYPE_LBK : NIX_INTF_TYPE_CGX;

	if (is_sdp_pfvf(pcifunc))

		intf = NIX_INTF_TYPE_SDP;
@@ -1684,6 +1693,9 @@ int rvu_mbox_handler_nix_lf_free(struct rvu *rvu, struct nix_lf_free_req *req, 
	if (nixlf < 0)

		return NIX_AF_ERR_AF_LF_INVALID;



	if (is_rep_dev(rvu, pcifunc))

		goto free_lf;



	if (req->flags & NIX_LF_DISABLE_FLOWS)

		rvu_npc_disable_mcam_entries(rvu, pcifunc, nixlf);

	else
@@ -1695,6 +1707,7 @@ int rvu_mbox_handler_nix_lf_free(struct rvu *rvu, struct nix_lf_free_req *req, 


	nix_interface_deinit(rvu, pcifunc, nixlf);



free_lf:

	/* Reset this NIX LF */

	err = rvu_lf_reset(rvu, block, nixlf);

	if (err) {
@@ -2007,7 +2020,8 @@ static void nix_get_txschq_range(struct rvu *rvu, u16 pcifunc, 
	struct rvu_hwinfo *hw = rvu->hw;

	int pf = rvu_get_pf(pcifunc);



	if (is_lbk_vf(rvu, pcifunc)) { /* LBK links */

	/* LBK links */

	if (is_lbk_vf(rvu, pcifunc) || is_rep_dev(rvu, pcifunc)) {

		*start = hw->cap.nix_txsch_per_cgx_lmac * link;

		*end = *start + hw->cap.nix_txsch_per_lbk_lmac;

	} else if (is_pf_cgxmapped(rvu, pf)) { /* CGX links */
@@ -4555,7 +4569,7 @@ int rvu_mbox_handler_nix_set_hw_frs(struct rvu *rvu, struct nix_frs_cfg *req, 
	if (!nix_hw)

		return NIX_AF_ERR_INVALID_NIXBLK;



	if (is_lbk_vf(rvu, pcifunc))

	if (is_lbk_vf(rvu, pcifunc) || is_rep_dev(rvu, pcifunc))

		rvu_get_lbk_link_max_frs(rvu, &max_mtu);

	else

		rvu_get_lmac_link_max_frs(rvu, &max_mtu);
@@ -4583,6 +4597,8 @@ int rvu_mbox_handler_nix_set_hw_frs(struct rvu *rvu, struct nix_frs_cfg *req, 
		/* For VFs of PF0 ingress is LBK port, so config LBK link */

		pfvf = rvu_get_pfvf(rvu, pcifunc);

		link = hw->cgx_links + pfvf->lbkid;

	} else if (is_rep_dev(rvu, pcifunc)) {

		link = hw->cgx_links + 0;

	}



	if (link < 0)