Commit 222dfb83 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'x86_misc_for_v6.11_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull misc x86 updates from Borislav Petkov:

 - Make error checking of AMD SMN accesses more robust in the callers as
   they're the only ones who can interpret the results properly

 - The usual cleanups and fixes, left and right

* tag 'x86_misc_for_v6.11_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/kmsan: Fix hook for unaligned accesses
  x86/platform/iosf_mbi: Convert PCIBIOS_* return codes to errnos
  x86/pci/xen: Fix PCIBIOS_* return code handling
  x86/pci/intel_mid_pci: Fix PCIBIOS_* return code handling
  x86/of: Return consistent error type from x86_of_pci_irq_enable()
  hwmon: (k10temp) Rename _data variable
  hwmon: (k10temp) Remove unused HAVE_TDIE() macro
  hwmon: (k10temp) Reduce k10temp_get_ccd_support() parameters
  hwmon: (k10temp) Define a helper function to read CCD temperature
  x86/amd_nb: Enhance SMN access error checking
  hwmon: (k10temp) Check return value of amd_smn_read()
  EDAC/amd64: Check return value of amd_smn_read()
  EDAC/amd64: Remove unused register accesses
  tools/x86/kcpuid: Add missing dir via Makefile
  x86, arm: Add missing license tag to syscall tables files
parents 1d86d352 bf6ab33d

arch/arm/tools/syscall.tbl

+1 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note

#

# Linux system call numbers and entry vectors

#

arch/x86/entry/syscalls/syscall_32.tbl

+1 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note

#

# 32-bit system call numbers and entry vectors

#

arch/x86/entry/syscalls/syscall_64.tbl

+1 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note

#

# 64-bit system call numbers and entry vectors

#

arch/x86/include/asm/amd_nb.h

+2 −2
Original line number Diff line number Diff line
@@ -21,8 +21,8 @@ extern int amd_numa_init(void); 
extern int amd_get_subcaches(int);

extern int amd_set_subcaches(int, unsigned long);



extern int amd_smn_read(u16 node, u32 address, u32 *value);

extern int amd_smn_write(u16 node, u32 address, u32 value);

int __must_check amd_smn_read(u16 node, u32 address, u32 *value);

int __must_check amd_smn_write(u16 node, u32 address, u32 value);



struct amd_l3_cache {

	unsigned indices;

arch/x86/kernel/amd_nb.c

+39 −5
Original line number Diff line number Diff line
@@ -180,6 +180,43 @@ static struct pci_dev *next_northbridge(struct pci_dev *dev, 
	return dev;

}



/*

 * SMN accesses may fail in ways that are difficult to detect here in the called

 * functions amd_smn_read() and amd_smn_write(). Therefore, callers must do

 * their own checking based on what behavior they expect.

 *

 * For SMN reads, the returned value may be zero if the register is Read-as-Zero.

 * Or it may be a "PCI Error Response", e.g. all 0xFFs. The "PCI Error Response"

 * can be checked here, and a proper error code can be returned.

 *

 * But the Read-as-Zero response cannot be verified here. A value of 0 may be

 * correct in some cases, so callers must check that this correct is for the

 * register/fields they need.

 *

 * For SMN writes, success can be determined through a "write and read back"

 * However, this is not robust when done here.

 *

 * Possible issues:

 *

 * 1) Bits that are "Write-1-to-Clear". In this case, the read value should

 *    *not* match the write value.

 *

 * 2) Bits that are "Read-as-Zero"/"Writes-Ignored". This information cannot be

 *    known here.

 *

 * 3) Bits that are "Reserved / Set to 1". Ditto above.

 *

 * Callers of amd_smn_write() should do the "write and read back" check

 * themselves, if needed.

 *

 * For #1, they can see if their target bits got cleared.

 *

 * For #2 and #3, they can check if their target bits got set as intended.

 *

 * This matches what is done for RDMSR/WRMSR. As long as there's no #GP, then

 * the operation is considered a success, and the caller does their own

 * checking.

 */

static int __amd_smn_rw(u16 node, u32 address, u32 *value, bool write)

{

	struct pci_dev *root;
@@ -202,9 +239,6 @@ static int __amd_smn_rw(u16 node, u32 address, u32 *value, bool write) 


	err = (write ? pci_write_config_dword(root, 0x64, *value)

		     : pci_read_config_dword(root, 0x64, value));

	if (err)

		pr_warn("Error %s SMN address 0x%x.\n",

			(write ? "writing to" : "reading from"), address);



out_unlock:

	mutex_unlock(&smn_mutex);
@@ -213,7 +247,7 @@ static int __amd_smn_rw(u16 node, u32 address, u32 *value, bool write) 
	return err;

}



int amd_smn_read(u16 node, u32 address, u32 *value)

int __must_check amd_smn_read(u16 node, u32 address, u32 *value)

{

	int err = __amd_smn_rw(node, address, value, false);
@@ -226,7 +260,7 @@ int amd_smn_read(u16 node, u32 address, u32 *value) 
}

EXPORT_SYMBOL_GPL(amd_smn_read);



int amd_smn_write(u16 node, u32 address, u32 value)

int __must_check amd_smn_write(u16 node, u32 address, u32 value)

{

	return __amd_smn_rw(node, address, &value, true);

}