Commit 223eaf4b authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/gr/gf100-gk208: make use of init_gpc_mmu() hook to share setup 



Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent 2854ab8d

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c

+18 −9
Original line number Diff line number Diff line
@@ -1903,25 +1903,33 @@ gf100_gr_new_(const struct gf100_gr_func *func, struct nvkm_device *device, 
	return 0;

}



void

gf100_gr_init_gpc_mmu(struct gf100_gr *gr)

{

	struct nvkm_device *device = gr->base.engine.subdev.device;

	struct nvkm_fb *fb = device->fb;



	nvkm_wr32(device, 0x418880, 0x00000000);

	nvkm_wr32(device, 0x4188a4, 0x00000000);

	nvkm_wr32(device, 0x418888, 0x00000000);

	nvkm_wr32(device, 0x41888c, 0x00000000);

	nvkm_wr32(device, 0x418890, 0x00000000);

	nvkm_wr32(device, 0x418894, 0x00000000);

	nvkm_wr32(device, 0x4188b4, nvkm_memory_addr(fb->mmu_wr) >> 8);

	nvkm_wr32(device, 0x4188b8, nvkm_memory_addr(fb->mmu_rd) >> 8);

}



int

gf100_gr_init(struct gf100_gr *gr)

{

	struct nvkm_device *device = gr->base.engine.subdev.device;

	struct nvkm_fb *fb = device->fb;

	const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total);

	u32 data[TPC_MAX / 8] = {};

	u8  tpcnr[GPC_MAX];

	int gpc, tpc, rop;

	int i;



	nvkm_wr32(device, GPC_BCAST(0x0880), 0x00000000);

	nvkm_wr32(device, GPC_BCAST(0x08a4), 0x00000000);

	nvkm_wr32(device, GPC_BCAST(0x0888), 0x00000000);

	nvkm_wr32(device, GPC_BCAST(0x088c), 0x00000000);

	nvkm_wr32(device, GPC_BCAST(0x0890), 0x00000000);

	nvkm_wr32(device, GPC_BCAST(0x0894), 0x00000000);

	nvkm_wr32(device, GPC_BCAST(0x08b4), nvkm_memory_addr(fb->mmu_wr) >> 8);

	nvkm_wr32(device, GPC_BCAST(0x08b8), nvkm_memory_addr(fb->mmu_rd) >> 8);

	gr->func->init_gpc_mmu(gr);



	gf100_gr_mmio(gr, gr->func->mmio);
@@ -2036,6 +2044,7 @@ gf100_gr_gpccs_ucode = { 
static const struct gf100_gr_func

gf100_gr = {

	.init = gf100_gr_init,

	.init_gpc_mmu = gf100_gr_init_gpc_mmu,

	.mmio = gf100_gr_pack_mmio,

	.fecs.ucode = &gf100_gr_fecs_ucode,

	.gpccs.ucode = &gf100_gr_gpccs_ucode,

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h

+1 −0
Original line number Diff line number Diff line
@@ -254,6 +254,7 @@ extern const struct gf100_gr_init gf100_gr_init_mpc_0[]; 
extern const struct gf100_gr_init gf100_gr_init_be_0[];

extern const struct gf100_gr_init gf100_gr_init_fe_1[];

extern const struct gf100_gr_init gf100_gr_init_pe_1[];

void gf100_gr_init_gpc_mmu(struct gf100_gr *);



extern const struct gf100_gr_init gf104_gr_init_ds_0[];

extern const struct gf100_gr_init gf104_gr_init_tex_0[];

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf104.c

+1 −0
Original line number Diff line number Diff line
@@ -115,6 +115,7 @@ gf104_gr_pack_mmio[] = { 
static const struct gf100_gr_func

gf104_gr = {

	.init = gf100_gr_init,

	.init_gpc_mmu = gf100_gr_init_gpc_mmu,

	.mmio = gf104_gr_pack_mmio,

	.fecs.ucode = &gf100_gr_fecs_ucode,

	.gpccs.ucode = &gf100_gr_gpccs_ucode,

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf108.c

+1 −0
Original line number Diff line number Diff line
@@ -106,6 +106,7 @@ gf108_gr_pack_mmio[] = { 
static const struct gf100_gr_func

gf108_gr = {

	.init = gf100_gr_init,

	.init_gpc_mmu = gf100_gr_init_gpc_mmu,

	.mmio = gf108_gr_pack_mmio,

	.fecs.ucode = &gf100_gr_fecs_ucode,

	.gpccs.ucode = &gf100_gr_gpccs_ucode,

drivers/gpu/drm/nouveau/nvkm/engine/gr/gf110.c

+1 −0
Original line number Diff line number Diff line
@@ -87,6 +87,7 @@ gf110_gr_pack_mmio[] = { 
static const struct gf100_gr_func

gf110_gr = {

	.init = gf100_gr_init,

	.init_gpc_mmu = gf100_gr_init_gpc_mmu,

	.mmio = gf110_gr_pack_mmio,

	.fecs.ucode = &gf100_gr_fecs_ucode,

	.gpccs.ucode = &gf100_gr_gpccs_ucode,