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Maximum and minimum offsets in ppb that can be handled are dependent on the rtc clock frequency and what can fit in the 16-bit register field. Reviewed-by:Harini T <harini.t@amd.com> Tested-by:
Harini T <harini.t@amd.com> Signed-off-by:
Tomas Melin <tomas.melin@vaisala.com> Acked-by:
Michal Simek <michal.simek@amd.com> Link: https://patch.msgid.link/20260122-zynqmp-rtc-updates-v4-5-d4edb966b499@vaisala.com Signed-off-by:
Alexandre Belloni <alexandre.belloni@bootlin.com>