Commit 22578178 authored by Dmitry Baryshkov's avatar Dmitry Baryshkov
Browse files

drm/msm/dp: allow voltage swing / pre emphasis of 3 



Both dp_link_adjust_levels() and dp_ctrl_update_vx_px() limit swing and
pre-emphasis to 2, while the real maximum value for the sum of the
voltage swing and pre-emphasis is 3. Fix the DP code to remove this
limitation.

Fixes: c943b494 ("drm/msm/dp: add displayPort driver support")
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: default avatarKuogee Hsieh <quic_khsieh@quicinc.com>
Tested-by: default avatarKuogee Hsieh <quic_khsieh@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/577006/
Link: https://lore.kernel.org/r/20240203-dp-swing-3-v1-1-6545e1706196@linaro.org
parent 766f7052

drivers/gpu/drm/msm/dp/dp_ctrl.c

+3 −3
Original line number Diff line number Diff line
@@ -1052,14 +1052,14 @@ static int dp_ctrl_update_vx_px(struct dp_ctrl_private *ctrl) 
	if (ret)

		return ret;



	if (voltage_swing_level >= DP_TRAIN_VOLTAGE_SWING_MAX) {

	if (voltage_swing_level >= DP_TRAIN_LEVEL_MAX) {

		drm_dbg_dp(ctrl->drm_dev,

				"max. voltage swing level reached %d\n",

				voltage_swing_level);

		max_level_reached |= DP_TRAIN_MAX_SWING_REACHED;

	}



	if (pre_emphasis_level >= DP_TRAIN_PRE_EMPHASIS_MAX) {

	if (pre_emphasis_level >= DP_TRAIN_LEVEL_MAX) {

		drm_dbg_dp(ctrl->drm_dev,

				"max. pre-emphasis level reached %d\n",

				pre_emphasis_level);
@@ -1150,7 +1150,7 @@ static int dp_ctrl_link_train_1(struct dp_ctrl_private *ctrl, 
		}



		if (ctrl->link->phy_params.v_level >=

			DP_TRAIN_VOLTAGE_SWING_MAX) {

			DP_TRAIN_LEVEL_MAX) {

			DRM_ERROR_RATELIMITED("max v_level reached\n");

			return -EAGAIN;

		}

drivers/gpu/drm/msm/dp/dp_link.c

+11 −11
Original line number Diff line number Diff line
@@ -1109,6 +1109,7 @@ int dp_link_get_colorimetry_config(struct dp_link *dp_link) 
int dp_link_adjust_levels(struct dp_link *dp_link, u8 *link_status)

{

	int i;

	u8 max_p_level;

	int v_max = 0, p_max = 0;

	struct dp_link_private *link;
@@ -1140,30 +1141,29 @@ int dp_link_adjust_levels(struct dp_link *dp_link, u8 *link_status) 
	 * Adjust the voltage swing and pre-emphasis level combination to within

	 * the allowable range.

	 */

	if (dp_link->phy_params.v_level > DP_TRAIN_VOLTAGE_SWING_MAX) {

	if (dp_link->phy_params.v_level > DP_TRAIN_LEVEL_MAX) {

		drm_dbg_dp(link->drm_dev,

			"Requested vSwingLevel=%d, change to %d\n",

			dp_link->phy_params.v_level,

			DP_TRAIN_VOLTAGE_SWING_MAX);

		dp_link->phy_params.v_level = DP_TRAIN_VOLTAGE_SWING_MAX;

			DP_TRAIN_LEVEL_MAX);

		dp_link->phy_params.v_level = DP_TRAIN_LEVEL_MAX;

	}



	if (dp_link->phy_params.p_level > DP_TRAIN_PRE_EMPHASIS_MAX) {

	if (dp_link->phy_params.p_level > DP_TRAIN_LEVEL_MAX) {

		drm_dbg_dp(link->drm_dev,

			"Requested preEmphasisLevel=%d, change to %d\n",

			dp_link->phy_params.p_level,

			DP_TRAIN_PRE_EMPHASIS_MAX);

		dp_link->phy_params.p_level = DP_TRAIN_PRE_EMPHASIS_MAX;

			DP_TRAIN_LEVEL_MAX);

		dp_link->phy_params.p_level = DP_TRAIN_LEVEL_MAX;

	}



	if ((dp_link->phy_params.p_level > DP_TRAIN_PRE_EMPHASIS_LVL_1)

		&& (dp_link->phy_params.v_level ==

			DP_TRAIN_VOLTAGE_SWING_LVL_2)) {

	max_p_level = DP_TRAIN_LEVEL_MAX - dp_link->phy_params.v_level;

	if (dp_link->phy_params.p_level > max_p_level) {

		drm_dbg_dp(link->drm_dev,

			"Requested preEmphasisLevel=%d, change to %d\n",

			dp_link->phy_params.p_level,

			DP_TRAIN_PRE_EMPHASIS_LVL_1);

		dp_link->phy_params.p_level = DP_TRAIN_PRE_EMPHASIS_LVL_1;

			max_p_level);

		dp_link->phy_params.p_level = max_p_level;

	}



	drm_dbg_dp(link->drm_dev, "adjusted: v_level=%d, p_level=%d\n",

drivers/gpu/drm/msm/dp/dp_link.h

+1 −13
Original line number Diff line number Diff line
@@ -19,19 +19,7 @@ struct dp_link_info { 
	unsigned long capabilities;

};



enum dp_link_voltage_level {

	DP_TRAIN_VOLTAGE_SWING_LVL_0	= 0,

	DP_TRAIN_VOLTAGE_SWING_LVL_1	= 1,

	DP_TRAIN_VOLTAGE_SWING_LVL_2	= 2,

	DP_TRAIN_VOLTAGE_SWING_MAX	= DP_TRAIN_VOLTAGE_SWING_LVL_2,

};



enum dp_link_preemaphasis_level {

	DP_TRAIN_PRE_EMPHASIS_LVL_0	= 0,

	DP_TRAIN_PRE_EMPHASIS_LVL_1	= 1,

	DP_TRAIN_PRE_EMPHASIS_LVL_2	= 2,

	DP_TRAIN_PRE_EMPHASIS_MAX	= DP_TRAIN_PRE_EMPHASIS_LVL_2,

};

#define DP_TRAIN_LEVEL_MAX	3



struct dp_link_test_video {

	u32 test_video_pattern;