Commit 230dced3 authored by Peichen Huang's avatar Peichen Huang Committed by Alex Deucher
Browse files

drm/amd/display: improve dpia pre-train 



[WHY]
We see unstable DP LL 4.2.1.3 test result with dpia pre-train. It is
because the outbox interrupt mechanism can not handle HPD
immediately and require some improvement.

[HOW]
1. not enable link if hpd_pending is true.
2. abort pre-train if training failed and hpd_pending is true.
3. check if 2 lane supported when it is alt mode

Reviewed-by: default avatarWenjing Liu <wenjing.liu@amd.com>
Reviewed-by: default avatarMeenakshikumar Somasundaram <meenakshikumar.somasundaram@amd.com>
Signed-off-by: default avatarPeichen Huang <PeiChen.Huang@amd.com>
Signed-off-by: default avatarTom Chung <chiahsuan.chung@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ec6d8d49

drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c

+3 −2
Original line number Diff line number Diff line
@@ -653,7 +653,8 @@ void dcn31_link_encoder_get_max_link_cap(struct link_encoder *enc, struct dc_lin 
		if (!query_dp_alt_from_dmub(enc, &cmd))

			return;



		if (cmd.query_dp_alt.data.is_usb &&

		if (cmd.query_dp_alt.data.is_dp_alt_disable == 0 &&

				cmd.query_dp_alt.data.is_usb &&

				cmd.query_dp_alt.data.is_dp4 == 0)

			link_settings->lane_count = MIN(LANE_COUNT_TWO, link_settings->lane_count);

drivers/gpu/drm/amd/display/dc/link/link_dpms.c

+9 −0
Original line number Diff line number Diff line
@@ -2548,6 +2548,15 @@ void link_set_dpms_on( 
	if (pipe_ctx->stream->dpms_off)

		return;



	/* For Dp tunneling link, a pending HPD means that we have a race condition between processing

	 * current link and processing the pending HPD. If we enable the link now, we may end up with a

	 * link that is not actually connected to a sink. So we skip enabling the link in this case.

	 */

	if (link->ep_type == DISPLAY_ENDPOINT_USB4_DPIA && link->is_hpd_pending) {

		DC_LOG_DEBUG("%s, Link%d HPD is pending, not enable it.\n", __func__, link->link_index);

		return;

	}



	/* Have to setup DSC before DIG FE and BE are connected (which happens before the

	 * link training). This is to make sure the bandwidth sent to DIG BE won't be

	 * bigger than what the link and/or DIG BE can handle. VBID[6]/CompressedStream_flag

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_capability.c

+8 −0
Original line number Diff line number Diff line
@@ -2312,6 +2312,14 @@ bool dp_verify_link_cap_with_retries( 
		} else {

			link->verified_link_cap = last_verified_link_cap;

		}



		/* For Dp tunneling link, a pending HPD means that we have a race condition between processing

		 * current link and processing the pending HPD. Since the training is failed, we should just brak

		 * the loop so that we have chance to process the pending HPD.

		 */

		if (link->ep_type == DISPLAY_ENDPOINT_USB4_DPIA && link->is_hpd_pending)

			break;



		fsleep(10 * 1000);

	}