Commit 230f3d53 authored by Jan Sokolowski's avatar Jan Sokolowski Committed by Jakub Kicinski
Browse files

i40e: remove i40e_status 



Replace uses of i40e_status to as equivalent as possible error codes.
Remove enum i40e_status as it is no longer needed

Signed-off-by: default avatarJan Sokolowski <jan.sokolowski@intel.com>
Tested-by: Gurucharan G <gurucharanx.g@intel.com> (A Contingent worker at Intel)
Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
Reviewed-by: default avatarLeon Romanovsky <leonro@nvidia.com>
Link: https://lore.kernel.org/r/20230728171336.2446156-1-anthony.l.nguyen@intel.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 68223f96

drivers/net/ethernet/intel/i40e/i40e_adminq.c

+24 −25
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0

/* Copyright(c) 2013 - 2018 Intel Corporation. */



#include "i40e_status.h"

#include "i40e_type.h"

#include "i40e_register.h"

#include "i40e_adminq.h"
@@ -284,7 +283,7 @@ static int i40e_config_asq_regs(struct i40e_hw *hw) 
	/* Check one register to verify that config was applied */

	reg = rd32(hw, hw->aq.asq.bal);

	if (reg != lower_32_bits(hw->aq.asq.desc_buf.pa))

		ret_code = I40E_ERR_ADMIN_QUEUE_ERROR;

		ret_code = -EIO;



	return ret_code;

}
@@ -316,7 +315,7 @@ static int i40e_config_arq_regs(struct i40e_hw *hw) 
	/* Check one register to verify that config was applied */

	reg = rd32(hw, hw->aq.arq.bal);

	if (reg != lower_32_bits(hw->aq.arq.desc_buf.pa))

		ret_code = I40E_ERR_ADMIN_QUEUE_ERROR;

		ret_code = -EIO;



	return ret_code;

}
@@ -340,14 +339,14 @@ static int i40e_init_asq(struct i40e_hw *hw) 


	if (hw->aq.asq.count > 0) {

		/* queue already initialized */

		ret_code = I40E_ERR_NOT_READY;

		ret_code = -EBUSY;

		goto init_adminq_exit;

	}



	/* verify input for valid configuration */

	if ((hw->aq.num_asq_entries == 0) ||

	    (hw->aq.asq_buf_size == 0)) {

		ret_code = I40E_ERR_CONFIG;

		ret_code = -EIO;

		goto init_adminq_exit;

	}
@@ -399,14 +398,14 @@ static int i40e_init_arq(struct i40e_hw *hw) 


	if (hw->aq.arq.count > 0) {

		/* queue already initialized */

		ret_code = I40E_ERR_NOT_READY;

		ret_code = -EBUSY;

		goto init_adminq_exit;

	}



	/* verify input for valid configuration */

	if ((hw->aq.num_arq_entries == 0) ||

	    (hw->aq.arq_buf_size == 0)) {

		ret_code = I40E_ERR_CONFIG;

		ret_code = -EIO;

		goto init_adminq_exit;

	}
@@ -452,7 +451,7 @@ static int i40e_shutdown_asq(struct i40e_hw *hw) 
	mutex_lock(&hw->aq.asq_mutex);



	if (hw->aq.asq.count == 0) {

		ret_code = I40E_ERR_NOT_READY;

		ret_code = -EBUSY;

		goto shutdown_asq_out;

	}
@@ -486,7 +485,7 @@ static int i40e_shutdown_arq(struct i40e_hw *hw) 
	mutex_lock(&hw->aq.arq_mutex);



	if (hw->aq.arq.count == 0) {

		ret_code = I40E_ERR_NOT_READY;

		ret_code = -EBUSY;

		goto shutdown_arq_out;

	}
@@ -594,7 +593,7 @@ int i40e_init_adminq(struct i40e_hw *hw) 
	    (hw->aq.num_asq_entries == 0) ||

	    (hw->aq.arq_buf_size == 0) ||

	    (hw->aq.asq_buf_size == 0)) {

		ret_code = I40E_ERR_CONFIG;

		ret_code = -EIO;

		goto init_adminq_exit;

	}
@@ -626,13 +625,13 @@ int i40e_init_adminq(struct i40e_hw *hw) 
							&hw->aq.api_maj_ver,

							&hw->aq.api_min_ver,

							NULL);

		if (ret_code != I40E_ERR_ADMIN_QUEUE_TIMEOUT)

		if (ret_code != -EIO)

			break;

		retry++;

		msleep(100);

		i40e_resume_aq(hw);

	} while (retry < 10);

	if (ret_code != I40E_SUCCESS)

	if (ret_code != 0)

		goto init_adminq_free_arq;



	/* Some features were introduced in different FW API version
@@ -672,7 +671,7 @@ int i40e_init_adminq(struct i40e_hw *hw) 
		hw->flags |= I40E_HW_FLAG_802_1AD_CAPABLE;



	if (hw->aq.api_maj_ver > I40E_FW_API_VERSION_MAJOR) {

		ret_code = I40E_ERR_FIRMWARE_API_VERSION;

		ret_code = -EIO;

		goto init_adminq_free_arq;

	}
@@ -799,7 +798,7 @@ i40e_asq_send_command_atomic_exec(struct i40e_hw *hw, 
	if (hw->aq.asq.count == 0) {

		i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE,

			   "AQTX: Admin queue not initialized.\n");

		status = I40E_ERR_QUEUE_EMPTY;

		status = -EIO;

		goto asq_send_command_error;

	}
@@ -809,7 +808,7 @@ i40e_asq_send_command_atomic_exec(struct i40e_hw *hw, 
	if (val >= hw->aq.num_asq_entries) {

		i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE,

			   "AQTX: head overrun at %d\n", val);

		status = I40E_ERR_ADMIN_QUEUE_FULL;

		status = -ENOSPC;

		goto asq_send_command_error;

	}
@@ -840,7 +839,7 @@ i40e_asq_send_command_atomic_exec(struct i40e_hw *hw, 
			   I40E_DEBUG_AQ_MESSAGE,

			   "AQTX: Invalid buffer size: %d.\n",

			   buff_size);

		status = I40E_ERR_INVALID_SIZE;

		status = -EINVAL;

		goto asq_send_command_error;

	}
@@ -848,7 +847,7 @@ i40e_asq_send_command_atomic_exec(struct i40e_hw *hw, 
		i40e_debug(hw,

			   I40E_DEBUG_AQ_MESSAGE,

			   "AQTX: Async flag not set along with postpone flag");

		status = I40E_ERR_PARAM;

		status = -EINVAL;

		goto asq_send_command_error;

	}
@@ -863,7 +862,7 @@ i40e_asq_send_command_atomic_exec(struct i40e_hw *hw, 
		i40e_debug(hw,

			   I40E_DEBUG_AQ_MESSAGE,

			   "AQTX: Error queue is full.\n");

		status = I40E_ERR_ADMIN_QUEUE_FULL;

		status = -ENOSPC;

		goto asq_send_command_error;

	}
@@ -940,9 +939,9 @@ i40e_asq_send_command_atomic_exec(struct i40e_hw *hw, 
		if ((enum i40e_admin_queue_err)retval == I40E_AQ_RC_OK)

			status = 0;

		else if ((enum i40e_admin_queue_err)retval == I40E_AQ_RC_EBUSY)

			status = I40E_ERR_NOT_READY;

			status = -EBUSY;

		else

			status = I40E_ERR_ADMIN_QUEUE_ERROR;

			status = -EIO;

		hw->aq.asq_last_status = (enum i40e_admin_queue_err)retval;

	}
@@ -960,11 +959,11 @@ i40e_asq_send_command_atomic_exec(struct i40e_hw *hw, 
		if (rd32(hw, hw->aq.asq.len) & I40E_GL_ATQLEN_ATQCRIT_MASK) {

			i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE,

				   "AQTX: AQ Critical error.\n");

			status = I40E_ERR_ADMIN_QUEUE_CRITICAL_ERROR;

			status = -EIO;

		} else {

			i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE,

				   "AQTX: Writeback timeout.\n");

			status = I40E_ERR_ADMIN_QUEUE_TIMEOUT;

			status = -EIO;

		}

	}
@@ -1106,7 +1105,7 @@ int i40e_clean_arq_element(struct i40e_hw *hw, 
	if (hw->aq.arq.count == 0) {

		i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE,

			   "AQRX: Admin queue not initialized.\n");

		ret_code = I40E_ERR_QUEUE_EMPTY;

		ret_code = -EIO;

		goto clean_arq_element_err;

	}
@@ -1114,7 +1113,7 @@ int i40e_clean_arq_element(struct i40e_hw *hw, 
	ntu = rd32(hw, hw->aq.arq.head) & I40E_PF_ARQH_ARQH_MASK;

	if (ntu == ntc) {

		/* nothing to do - shouldn't need to update ring's values */

		ret_code = I40E_ERR_ADMIN_QUEUE_NO_WORK;

		ret_code = -EALREADY;

		goto clean_arq_element_out;

	}
@@ -1126,7 +1125,7 @@ int i40e_clean_arq_element(struct i40e_hw *hw, 
		(enum i40e_admin_queue_err)le16_to_cpu(desc->retval);

	flags = le16_to_cpu(desc->flags);

	if (flags & I40E_AQ_FLAG_ERR) {

		ret_code = I40E_ERR_ADMIN_QUEUE_ERROR;

		ret_code = -EIO;

		i40e_debug(hw,

			   I40E_DEBUG_AQ_MESSAGE,

			   "AQRX: Event received with error 0x%X.\n",

drivers/net/ethernet/intel/i40e/i40e_adminq.h

+1 −2
Original line number Diff line number Diff line
@@ -5,7 +5,6 @@ 
#define _I40E_ADMINQ_H_



#include "i40e_osdep.h"

#include "i40e_status.h"

#include "i40e_adminq_cmd.h"



#define I40E_ADMINQ_DESC(R, i)   \
@@ -117,7 +116,7 @@ static inline int i40e_aq_rc_to_posix(int aq_ret, int aq_rc) 
	};



	/* aq_rc is invalid if AQ timed out */

	if (aq_ret == I40E_ERR_ADMIN_QUEUE_TIMEOUT)

	if (aq_ret == -EIO)

		return -EAGAIN;



	if (!((u32)aq_rc < (sizeof(aq_to_posix) / sizeof((aq_to_posix)[0]))))

drivers/net/ethernet/intel/i40e/i40e_common.c

+58 −58
Original line number Diff line number Diff line
@@ -56,7 +56,7 @@ int i40e_set_mac_type(struct i40e_hw *hw) 
			break;

		}

	} else {

		status = I40E_ERR_DEVICE_NOT_SUPPORTED;

		status = -ENODEV;

	}



	hw_dbg(hw, "i40e_set_mac_type found mac: %d, returns: %d\n",
@@ -660,7 +660,7 @@ int i40e_init_shared_code(struct i40e_hw *hw) 
	case I40E_MAC_X722:

		break;

	default:

		return I40E_ERR_DEVICE_NOT_SUPPORTED;

		return -ENODEV;

	}



	hw->phy.get_link_info = true;
@@ -780,7 +780,7 @@ int i40e_get_port_mac_addr(struct i40e_hw *hw, u8 *mac_addr) 
	if (flags & I40E_AQC_PORT_ADDR_VALID)

		ether_addr_copy(mac_addr, addrs.port_mac);

	else

		status = I40E_ERR_INVALID_MAC_ADDR;

		status = -EINVAL;



	return status;

}
@@ -858,7 +858,7 @@ int i40e_read_pba_string(struct i40e_hw *hw, u8 *pba_num, 
	pba_size--;

	if (pba_num_size < (((u32)pba_size * 2) + 1)) {

		hw_dbg(hw, "Buffer too small for PBA data.\n");

		return I40E_ERR_PARAM;

		return -EINVAL;

	}



	for (i = 0; i < pba_size; i++) {
@@ -955,7 +955,7 @@ static int i40e_poll_globr(struct i40e_hw *hw, 
	hw_dbg(hw, "Global reset failed.\n");

	hw_dbg(hw, "I40E_GLGEN_RSTAT = 0x%x\n", reg);



	return I40E_ERR_RESET_FAILED;

	return -EIO;

}



#define I40E_PF_RESET_WAIT_COUNT_A0	200
@@ -995,7 +995,7 @@ int i40e_pf_reset(struct i40e_hw *hw) 
	}

	if (reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK) {

		hw_dbg(hw, "Global reset polling failed to complete.\n");

		return I40E_ERR_RESET_FAILED;

		return -EIO;

	}



	/* Now Wait for the FW to be ready */
@@ -1014,7 +1014,7 @@ int i40e_pf_reset(struct i40e_hw *hw) 
		     I40E_GLNVM_ULD_CONF_GLOBAL_DONE_MASK))) {

		hw_dbg(hw, "wait for FW Reset complete timedout\n");

		hw_dbg(hw, "I40E_GLNVM_ULD = 0x%x\n", reg);

		return I40E_ERR_RESET_FAILED;

		return -EIO;

	}



	/* If there was a Global Reset in progress when we got here,
@@ -1040,10 +1040,10 @@ int i40e_pf_reset(struct i40e_hw *hw) 
		}

		if (reg2 & I40E_GLGEN_RSTAT_DEVSTATE_MASK) {

			if (i40e_poll_globr(hw, grst_del))

				return I40E_ERR_RESET_FAILED;

				return -EIO;

		} else if (reg & I40E_PFGEN_CTRL_PFSWR_MASK) {

			hw_dbg(hw, "PF reset polling failed to complete.\n");

			return I40E_ERR_RESET_FAILED;

			return -EIO;

		}

	}
@@ -1318,7 +1318,7 @@ i40e_aq_get_phy_capabilities(struct i40e_hw *hw, 
	int status;



	if (!abilities)

		return I40E_ERR_PARAM;

		return -EINVAL;



	do {

		i40e_fill_default_direct_cmd_desc(&desc,
@@ -1341,12 +1341,12 @@ i40e_aq_get_phy_capabilities(struct i40e_hw *hw, 


		switch (hw->aq.asq_last_status) {

		case I40E_AQ_RC_EIO:

			status = I40E_ERR_UNKNOWN_PHY;

			status = -EIO;

			break;

		case I40E_AQ_RC_EAGAIN:

			usleep_range(1000, 2000);

			total_delay++;

			status = I40E_ERR_TIMEOUT;

			status = -EIO;

			break;

		/* also covers I40E_AQ_RC_OK */

		default:
@@ -1396,7 +1396,7 @@ int i40e_aq_set_phy_config(struct i40e_hw *hw, 
	int status;



	if (!config)

		return I40E_ERR_PARAM;

		return -EINVAL;



	i40e_fill_default_direct_cmd_desc(&desc,

					  i40e_aqc_opc_set_phy_config);
@@ -2312,7 +2312,7 @@ int i40e_aq_send_driver_version(struct i40e_hw *hw, 
	u16 len;



	if (dv == NULL)

		return I40E_ERR_PARAM;

		return -EINVAL;



	i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_driver_version);
@@ -2430,7 +2430,7 @@ int i40e_aq_add_veb(struct i40e_hw *hw, u16 uplink_seid, 


	/* SEIDs need to either both be set or both be 0 for floating VEB */

	if (!!uplink_seid != !!downlink_seid)

		return I40E_ERR_PARAM;

		return -EINVAL;



	i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_veb);
@@ -2485,7 +2485,7 @@ int i40e_aq_get_veb_parameters(struct i40e_hw *hw, 
	int status;



	if (veb_seid == 0)

		return I40E_ERR_PARAM;

		return -EINVAL;



	i40e_fill_default_direct_cmd_desc(&desc,

					  i40e_aqc_opc_get_veb_parameters);
@@ -2575,7 +2575,7 @@ i40e_aq_add_macvlan(struct i40e_hw *hw, u16 seid, 
	u16 buf_size;



	if (count == 0 || !mv_list || !hw)

		return I40E_ERR_PARAM;

		return -EINVAL;



	buf_size = i40e_prepare_add_macvlan(mv_list, &desc, count, seid);
@@ -2608,7 +2608,7 @@ i40e_aq_add_macvlan_v2(struct i40e_hw *hw, u16 seid, 
	u16 buf_size;



	if (count == 0 || !mv_list || !hw)

		return I40E_ERR_PARAM;

		return -EINVAL;



	buf_size = i40e_prepare_add_macvlan(mv_list, &desc, count, seid);
@@ -2638,7 +2638,7 @@ i40e_aq_remove_macvlan(struct i40e_hw *hw, u16 seid, 
	int status;



	if (count == 0 || !mv_list || !hw)

		return I40E_ERR_PARAM;

		return -EINVAL;



	buf_size = count * sizeof(*mv_list);
@@ -2685,7 +2685,7 @@ i40e_aq_remove_macvlan_v2(struct i40e_hw *hw, u16 seid, 
	u16 buf_size;



	if (count == 0 || !mv_list || !hw)

		return I40E_ERR_PARAM;

		return -EINVAL;



	buf_size = count * sizeof(*mv_list);
@@ -2791,7 +2791,7 @@ int i40e_aq_add_mirrorrule(struct i40e_hw *hw, u16 sw_seid, 
	if (!(rule_type == I40E_AQC_MIRROR_RULE_TYPE_ALL_INGRESS ||

	    rule_type == I40E_AQC_MIRROR_RULE_TYPE_ALL_EGRESS)) {

		if (count == 0 || !mr_list)

			return I40E_ERR_PARAM;

			return -EINVAL;

	}



	return i40e_mirrorrule_op(hw, i40e_aqc_opc_add_mirror_rule, sw_seid,
@@ -2827,7 +2827,7 @@ int i40e_aq_delete_mirrorrule(struct i40e_hw *hw, u16 sw_seid, 
		 * not matter.

		 */

		if (count == 0 || !mr_list)

			return I40E_ERR_PARAM;

			return -EINVAL;

	}



	return i40e_mirrorrule_op(hw, i40e_aqc_opc_delete_mirror_rule, sw_seid,
@@ -2892,7 +2892,7 @@ int i40e_aq_debug_read_register(struct i40e_hw *hw, 
	int status;



	if (reg_val == NULL)

		return I40E_ERR_PARAM;

		return -EINVAL;



	i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_debug_read_reg);
@@ -3031,7 +3031,7 @@ int i40e_aq_read_nvm(struct i40e_hw *hw, u8 module_pointer, 


	/* In offset the highest byte must be zeroed. */

	if (offset & 0xFF000000) {

		status = I40E_ERR_PARAM;

		status = -EINVAL;

		goto i40e_aq_read_nvm_exit;

	}
@@ -3076,7 +3076,7 @@ int i40e_aq_erase_nvm(struct i40e_hw *hw, u8 module_pointer, 


	/* In offset the highest byte must be zeroed. */

	if (offset & 0xFF000000) {

		status = I40E_ERR_PARAM;

		status = -EINVAL;

		goto i40e_aq_erase_nvm_exit;

	}
@@ -3368,7 +3368,7 @@ int i40e_aq_discover_capabilities(struct i40e_hw *hw, 


	if (list_type_opc != i40e_aqc_opc_list_func_capabilities &&

		list_type_opc != i40e_aqc_opc_list_dev_capabilities) {

		status = I40E_ERR_PARAM;

		status = -EINVAL;

		goto exit;

	}
@@ -3416,7 +3416,7 @@ int i40e_aq_update_nvm(struct i40e_hw *hw, u8 module_pointer, 


	/* In offset the highest byte must be zeroed. */

	if (offset & 0xFF000000) {

		status = I40E_ERR_PARAM;

		status = -EINVAL;

		goto i40e_aq_update_nvm_exit;

	}
@@ -3473,7 +3473,7 @@ int i40e_aq_rearrange_nvm(struct i40e_hw *hw, 
			 I40E_AQ_NVM_REARRANGE_TO_STRUCT);



	if (!rearrange_nvm) {

		status = I40E_ERR_PARAM;

		status = -EINVAL;

		goto i40e_aq_rearrange_nvm_exit;

	}
@@ -3510,7 +3510,7 @@ int i40e_aq_get_lldp_mib(struct i40e_hw *hw, u8 bridge_type, 
	int status;



	if (buff_size == 0 || !buff)

		return I40E_ERR_PARAM;

		return -EINVAL;



	i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_get_mib);

	/* Indirect Command */
@@ -3558,7 +3558,7 @@ i40e_aq_set_lldp_mib(struct i40e_hw *hw, 


	cmd = (struct i40e_aqc_lldp_set_local_mib *)&desc.params.raw;

	if (buff_size == 0 || !buff)

		return I40E_ERR_PARAM;

		return -EINVAL;



	i40e_fill_default_direct_cmd_desc(&desc,

					  i40e_aqc_opc_lldp_set_local_mib);
@@ -3627,7 +3627,7 @@ i40e_aq_restore_lldp(struct i40e_hw *hw, u8 *setting, bool restore, 
	if (!(hw->flags & I40E_HW_FLAG_FW_LLDP_PERSISTENT)) {

		i40e_debug(hw, I40E_DEBUG_ALL,

			   "Restore LLDP not supported by current FW version.\n");

		return I40E_ERR_DEVICE_NOT_SUPPORTED;

		return -ENODEV;

	}



	i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_restore);
@@ -3729,7 +3729,7 @@ i40e_aq_set_dcb_parameters(struct i40e_hw *hw, bool dcb_enable, 
	int status;



	if (!(hw->flags & I40E_HW_FLAG_FW_LLDP_STOPPABLE))

		return I40E_ERR_DEVICE_NOT_SUPPORTED;

		return -ENODEV;



	i40e_fill_default_direct_cmd_desc(&desc,

					  i40e_aqc_opc_set_dcb_parameters);
@@ -3760,7 +3760,7 @@ int i40e_aq_get_cee_dcb_config(struct i40e_hw *hw, 
	int status;



	if (buff_size == 0 || !buff)

		return I40E_ERR_PARAM;

		return -EINVAL;



	i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_get_cee_dcb_cfg);
@@ -3848,7 +3848,7 @@ int i40e_aq_delete_element(struct i40e_hw *hw, u16 seid, 
	int status;



	if (seid == 0)

		return I40E_ERR_PARAM;

		return -EINVAL;



	i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_delete_element);
@@ -3922,7 +3922,7 @@ static int i40e_aq_tx_sched_cmd(struct i40e_hw *hw, u16 seid, 
		cmd_param_flag = false;

		break;

	default:

		return I40E_ERR_PARAM;

		return -EINVAL;

	}



	i40e_fill_default_direct_cmd_desc(&desc, opcode);
@@ -4148,7 +4148,7 @@ i40e_validate_filter_settings(struct i40e_hw *hw, 
		fcoe_filt_size <<= (u32)settings->fcoe_filt_num;

		break;

	default:

		return I40E_ERR_PARAM;

		return -EINVAL;

	}



	switch (settings->fcoe_cntx_num) {
@@ -4160,7 +4160,7 @@ i40e_validate_filter_settings(struct i40e_hw *hw, 
		fcoe_cntx_size <<= (u32)settings->fcoe_cntx_num;

		break;

	default:

		return I40E_ERR_PARAM;

		return -EINVAL;

	}



	/* Validate PE settings passed */
@@ -4178,7 +4178,7 @@ i40e_validate_filter_settings(struct i40e_hw *hw, 
	case I40E_HASH_FILTER_SIZE_1M:

		break;

	default:

		return I40E_ERR_PARAM;

		return -EINVAL;

	}



	switch (settings->pe_cntx_num) {
@@ -4194,7 +4194,7 @@ i40e_validate_filter_settings(struct i40e_hw *hw, 
	case I40E_DMA_CNTX_SIZE_256K:

		break;

	default:

		return I40E_ERR_PARAM;

		return -EINVAL;

	}



	/* FCHSIZE + FCDSIZE should not be greater than PMFCOEFMAX */
@@ -4202,7 +4202,7 @@ i40e_validate_filter_settings(struct i40e_hw *hw, 
	fcoe_fmax = (val & I40E_GLHMC_FCOEFMAX_PMFCOEFMAX_MASK)

		     >> I40E_GLHMC_FCOEFMAX_PMFCOEFMAX_SHIFT;

	if (fcoe_filt_size + fcoe_cntx_size >  fcoe_fmax)

		return I40E_ERR_INVALID_SIZE;

		return -EINVAL;



	return 0;

}
@@ -4224,7 +4224,7 @@ int i40e_set_filter_control(struct i40e_hw *hw, 
	u32 val;



	if (!settings)

		return I40E_ERR_PARAM;

		return -EINVAL;



	/* Validate the input settings */

	ret = i40e_validate_filter_settings(hw, settings);
@@ -4306,7 +4306,7 @@ int i40e_aq_add_rem_control_packet_filter(struct i40e_hw *hw, 
	int status;



	if (vsi_seid == 0)

		return I40E_ERR_PARAM;

		return -EINVAL;



	if (is_add) {

		i40e_fill_default_direct_cmd_desc(&desc,
@@ -4381,7 +4381,7 @@ static int i40e_aq_alternate_read(struct i40e_hw *hw, 
	int status;



	if (!reg_val0)

		return I40E_ERR_PARAM;

		return -EINVAL;



	i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_alternate_read);

	cmd_resp->address0 = cpu_to_le32(reg_addr0);
@@ -4517,7 +4517,7 @@ int i40e_aq_debug_dump(struct i40e_hw *hw, u8 cluster_id, 
	int status;



	if (buff_size == 0 || !buff)

		return I40E_ERR_PARAM;

		return -EINVAL;



	i40e_fill_default_direct_cmd_desc(&desc,

					  i40e_aqc_opc_debug_dump_internals);
@@ -4635,7 +4635,7 @@ int i40e_read_phy_register_clause22(struct i40e_hw *hw, 
				    u16 reg, u8 phy_addr, u16 *value)

{

	u8 port_num = (u8)hw->func_caps.mdio_port_num;

	int status = I40E_ERR_TIMEOUT;

	int status = -EIO;

	u32 command = 0;

	u16 retry = 1000;
@@ -4680,7 +4680,7 @@ int i40e_write_phy_register_clause22(struct i40e_hw *hw, 
				     u16 reg, u8 phy_addr, u16 value)

{

	u8 port_num = (u8)hw->func_caps.mdio_port_num;

	int status = I40E_ERR_TIMEOUT;

	int status = -EIO;

	u32 command  = 0;

	u16 retry = 1000;
@@ -4721,7 +4721,7 @@ int i40e_read_phy_register_clause45(struct i40e_hw *hw, 
				    u8 page, u16 reg, u8 phy_addr, u16 *value)

{

	u8 port_num = hw->func_caps.mdio_port_num;

	int status = I40E_ERR_TIMEOUT;

	int status = -EIO;

	u32 command = 0;

	u16 retry = 1000;
@@ -4755,7 +4755,7 @@ int i40e_read_phy_register_clause45(struct i40e_hw *hw, 
		  (I40E_MDIO_CLAUSE45_STCODE_MASK) |

		  (I40E_GLGEN_MSCA_MDICMD_MASK) |

		  (I40E_GLGEN_MSCA_MDIINPROGEN_MASK);

	status = I40E_ERR_TIMEOUT;

	status = -EIO;

	retry = 1000;

	wr32(hw, I40E_GLGEN_MSCA(port_num), command);

	do {
@@ -4795,7 +4795,7 @@ int i40e_write_phy_register_clause45(struct i40e_hw *hw, 
				     u8 page, u16 reg, u8 phy_addr, u16 value)

{

	u8 port_num = hw->func_caps.mdio_port_num;

	int status = I40E_ERR_TIMEOUT;

	int status = -EIO;

	u16 retry = 1000;

	u32 command = 0;
@@ -4831,7 +4831,7 @@ int i40e_write_phy_register_clause45(struct i40e_hw *hw, 
		  (I40E_MDIO_CLAUSE45_STCODE_MASK) |

		  (I40E_GLGEN_MSCA_MDICMD_MASK) |

		  (I40E_GLGEN_MSCA_MDIINPROGEN_MASK);

	status = I40E_ERR_TIMEOUT;

	status = -EIO;

	retry = 1000;

	wr32(hw, I40E_GLGEN_MSCA(port_num), command);

	do {
@@ -4880,7 +4880,7 @@ int i40e_write_phy_register(struct i40e_hw *hw, 
							  phy_addr, value);

		break;

	default:

		status = I40E_ERR_UNKNOWN_PHY;

		status = -EIO;

		break;

	}
@@ -4919,7 +4919,7 @@ int i40e_read_phy_register(struct i40e_hw *hw, 
							 phy_addr, value);

		break;

	default:

		status = I40E_ERR_UNKNOWN_PHY;

		status = -EIO;

		break;

	}
@@ -5109,7 +5109,7 @@ int i40e_led_get_phy(struct i40e_hw *hw, u16 *led_addr, 
					       I40E_PHY_COM_REG_PAGE, true,

					       I40E_PHY_LED_PROV_REG_1,

					       &reg_val_aq, NULL);

		if (status == I40E_SUCCESS)

		if (status == 0)

			*val = (u16)reg_val_aq;

		return status;

	}
@@ -5204,7 +5204,7 @@ int i40e_aq_rx_ctl_read_register(struct i40e_hw *hw, 
	int status;



	if (!reg_val)

		return I40E_ERR_PARAM;

		return -EINVAL;



	i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_rx_ctl_reg_read);
@@ -5644,7 +5644,7 @@ i40e_validate_profile(struct i40e_hw *hw, struct i40e_profile_segment *profile, 


	if (track_id == I40E_DDP_TRACKID_INVALID) {

		i40e_debug(hw, I40E_DEBUG_PACKAGE, "Invalid track_id\n");

		return I40E_NOT_SUPPORTED;

		return -EOPNOTSUPP;

	}



	dev_cnt = profile->device_table_count;
@@ -5657,7 +5657,7 @@ i40e_validate_profile(struct i40e_hw *hw, struct i40e_profile_segment *profile, 
	if (dev_cnt && i == dev_cnt) {

		i40e_debug(hw, I40E_DEBUG_PACKAGE,

			   "Device doesn't support DDP\n");

		return I40E_ERR_DEVICE_NOT_SUPPORTED;

		return -ENODEV;

	}



	I40E_SECTION_TABLE(profile, sec_tbl);
@@ -5672,14 +5672,14 @@ i40e_validate_profile(struct i40e_hw *hw, struct i40e_profile_segment *profile, 
			    sec->section.type == SECTION_TYPE_RB_AQ) {

				i40e_debug(hw, I40E_DEBUG_PACKAGE,

					   "Not a roll-back package\n");

				return I40E_NOT_SUPPORTED;

				return -EOPNOTSUPP;

			}

		} else {

			if (sec->section.type == SECTION_TYPE_RB_AQ ||

			    sec->section.type == SECTION_TYPE_RB_MMIO) {

				i40e_debug(hw, I40E_DEBUG_PACKAGE,

					   "Not an original package\n");

				return I40E_NOT_SUPPORTED;

				return -EOPNOTSUPP;

			}

		}

	}

drivers/net/ethernet/intel/i40e/i40e_dcb.c

+10 −10
Original line number Diff line number Diff line
@@ -17,7 +17,7 @@ int i40e_get_dcbx_status(struct i40e_hw *hw, u16 *status) 
	u32 reg;



	if (!status)

		return I40E_ERR_PARAM;

		return -EINVAL;



	reg = rd32(hw, I40E_PRTDCB_GENS);

	*status = (u16)((reg & I40E_PRTDCB_GENS_DCBX_STATUS_MASK) >>
@@ -508,7 +508,7 @@ int i40e_lldp_to_dcb_config(u8 *lldpmib, 
	u16 type;



	if (!lldpmib || !dcbcfg)

		return I40E_ERR_PARAM;

		return -EINVAL;



	/* set to the start of LLDPDU */

	lldpmib += ETH_HLEN;
@@ -874,7 +874,7 @@ int i40e_init_dcb(struct i40e_hw *hw, bool enable_mib_change) 
	int ret = 0;



	if (!hw->func_caps.dcb)

		return I40E_NOT_SUPPORTED;

		return -EOPNOTSUPP;



	/* Read LLDP NVM area */

	if (hw->flags & I40E_HW_FLAG_FW_LLDP_PERSISTENT) {
@@ -885,7 +885,7 @@ int i40e_init_dcb(struct i40e_hw *hw, bool enable_mib_change) 
		else if (hw->mac.type == I40E_MAC_X722)

			offset = I40E_LLDP_CURRENT_STATUS_X722_OFFSET;

		else

			return I40E_NOT_SUPPORTED;

			return -EOPNOTSUPP;



		ret = i40e_read_nvm_module_data(hw,

						I40E_SR_EMP_SR_SETTINGS_PTR,
@@ -897,7 +897,7 @@ int i40e_init_dcb(struct i40e_hw *hw, bool enable_mib_change) 
		ret = i40e_read_lldp_cfg(hw, &lldp_cfg);

	}

	if (ret)

		return I40E_ERR_NOT_READY;

		return -EBUSY;



	/* Get the LLDP AdminStatus for the current port */

	adminstatus = lldp_cfg.adminstatus >> (hw->port * 4);
@@ -906,7 +906,7 @@ int i40e_init_dcb(struct i40e_hw *hw, bool enable_mib_change) 
	/* LLDP agent disabled */

	if (!adminstatus) {

		hw->dcbx_status = I40E_DCBX_STATUS_DISABLED;

		return I40E_ERR_NOT_READY;

		return -EBUSY;

	}



	/* Get DCBX status */
@@ -922,7 +922,7 @@ int i40e_init_dcb(struct i40e_hw *hw, bool enable_mib_change) 
		if (ret)

			return ret;

	} else if (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED) {

		return I40E_ERR_NOT_READY;

		return -EBUSY;

	}



	/* Configure the LLDP MIB change event */
@@ -949,7 +949,7 @@ i40e_get_fw_lldp_status(struct i40e_hw *hw, 
	int ret;



	if (!lldp_status)

		return I40E_ERR_PARAM;

		return -EINVAL;



	/* Allocate buffer for the LLDPDU */

	ret = i40e_allocate_virt_mem(hw, &mem, I40E_LLDPDU_SIZE);
@@ -1299,7 +1299,7 @@ int i40e_dcb_config_to_lldp(u8 *lldpmib, u16 *miblen, 
			      sizeof(tlv->typelength) + length);

	} while (tlvid < I40E_TLV_ID_END_OF_LLDPPDU);

	*miblen = offset;

	return I40E_SUCCESS;

	return 0;

}



/**
@@ -1957,7 +1957,7 @@ int i40e_read_lldp_cfg(struct i40e_hw *hw, 
	u32 mem;



	if (!lldp_cfg)

		return I40E_ERR_PARAM;

		return -EINVAL;



	ret = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);

	if (ret)

drivers/net/ethernet/intel/i40e/i40e_ddp.c

+1 −1
Original line number Diff line number Diff line
@@ -344,7 +344,7 @@ int i40e_ddp_load(struct net_device *netdev, const u8 *data, size_t size, 
	if (is_add) {

		status = i40e_write_profile(&pf->hw, profile_hdr, track_id);

		if (status) {

			if (status == I40E_ERR_DEVICE_NOT_SUPPORTED) {

			if (status == -ENODEV) {

				netdev_err(netdev,

					   "Profile is not supported by the device.");

				return -EPERM;