Commit 23bbd287 authored by Oleksij Rempel's avatar Oleksij Rempel Committed by Paolo Abeni
Browse files

net: phy: dp83td510: add statistics support 



Add support for reporting PHY statistics in the DP83TD510 driver. This
includes cumulative tracking of transmit/receive packet counts, and
error counts. Implemented functions to update and provide statistics via
ethtool, with optional polling support enabled through `PHY_POLL_STATS`.

Signed-off-by: default avatarOleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: default avatarPaolo Abeni <pabeni@redhat.com>
parent f2bc1c26

drivers/net/phy/dp83td510.c

+112 −0
Original line number Diff line number Diff line
@@ -34,6 +34,29 @@ 
#define DP83TD510E_CTRL_HW_RESET		BIT(15)

#define DP83TD510E_CTRL_SW_RESET		BIT(14)



/*

 * DP83TD510E_PKT_STAT_x registers correspond to similarly named registers

 * in the datasheet (PKT_STAT_1 through PKT_STAT_6). These registers store

 * 32-bit or 16-bit counters for TX and RX statistics and must be read in

 * sequence to ensure the counters are cleared correctly.

 *

 * - DP83TD510E_PKT_STAT_1: Contains TX packet count bits [15:0].

 * - DP83TD510E_PKT_STAT_2: Contains TX packet count bits [31:16].

 * - DP83TD510E_PKT_STAT_3: Contains TX error packet count.

 * - DP83TD510E_PKT_STAT_4: Contains RX packet count bits [15:0].

 * - DP83TD510E_PKT_STAT_5: Contains RX packet count bits [31:16].

 * - DP83TD510E_PKT_STAT_6: Contains RX error packet count.

 *

 * Keeping the register names as defined in the datasheet helps maintain

 * clarity and alignment with the documentation.

 */

#define DP83TD510E_PKT_STAT_1			0x12b

#define DP83TD510E_PKT_STAT_2			0x12c

#define DP83TD510E_PKT_STAT_3			0x12d

#define DP83TD510E_PKT_STAT_4			0x12e

#define DP83TD510E_PKT_STAT_5			0x12f

#define DP83TD510E_PKT_STAT_6			0x130



#define DP83TD510E_AN_STAT_1			0x60c

#define DP83TD510E_MASTER_SLAVE_RESOL_FAIL	BIT(15)
@@ -58,8 +81,16 @@ static const u16 dp83td510_mse_sqi_map[] = { 
	0x0000  /* 24dB =< SNR */

};



struct dp83td510_stats {

	u64 tx_pkt_cnt;

	u64 tx_err_pkt_cnt;

	u64 rx_pkt_cnt;

	u64 rx_err_pkt_cnt;

};



struct dp83td510_priv {

	bool alcd_test_active;

	struct dp83td510_stats stats;

};



/* Time Domain Reflectometry (TDR) Functionality of DP83TD510 PHY
@@ -177,6 +208,85 @@ struct dp83td510_priv { 
#define DP83TD510E_ALCD_COMPLETE			BIT(15)

#define DP83TD510E_ALCD_CABLE_LENGTH			GENMASK(10, 0)



/**

 * dp83td510_update_stats - Update the PHY statistics for the DP83TD510 PHY.

 * @phydev: Pointer to the phy_device structure.

 *

 * The function reads the PHY statistics registers and updates the statistics

 * structure.

 *

 * Returns: 0 on success or a negative error code on failure.

 */

static int dp83td510_update_stats(struct phy_device *phydev)

{

	struct dp83td510_priv *priv = phydev->priv;

	u32 count;

	int ret;



	/* The DP83TD510E_PKT_STAT registers are divided into two groups:

	 * - Group 1 (TX stats): DP83TD510E_PKT_STAT_1 to DP83TD510E_PKT_STAT_3

	 * - Group 2 (RX stats): DP83TD510E_PKT_STAT_4 to DP83TD510E_PKT_STAT_6

	 *

	 * Registers in each group are cleared only after reading them in a

	 * plain sequence (e.g., 1, 2, 3 for Group 1 or 4, 5, 6 for Group 2).

	 * Any deviation from the sequence, such as reading 1, 2, 1, 2, 3, will

	 * prevent the group from being cleared. Additionally, the counters

	 * for a group are frozen as soon as the first register in that group

	 * is accessed.

	 */

	ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_PKT_STAT_1);

	if (ret < 0)

		return ret;

	/* tx_pkt_cnt_15_0 */

	count = ret;



	ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_PKT_STAT_2);

	if (ret < 0)

		return ret;

	/* tx_pkt_cnt_31_16 */

	count |= ret << 16;

	priv->stats.tx_pkt_cnt += count;



	ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_PKT_STAT_3);

	if (ret < 0)

		return ret;

	/* tx_err_pkt_cnt */

	priv->stats.tx_err_pkt_cnt += ret;



	ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_PKT_STAT_4);

	if (ret < 0)

		return ret;

	/* rx_pkt_cnt_15_0 */

	count = ret;



	ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_PKT_STAT_5);

	if (ret < 0)

		return ret;

	/* rx_pkt_cnt_31_16 */

	count |= ret << 16;

	priv->stats.rx_pkt_cnt += count;



	ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_PKT_STAT_6);

	if (ret < 0)

		return ret;

	/* rx_err_pkt_cnt */

	priv->stats.rx_err_pkt_cnt += ret;



	return 0;

}



static void dp83td510_get_phy_stats(struct phy_device *phydev,

				    struct ethtool_eth_phy_stats *eth_stats,

				    struct ethtool_phy_stats *stats)

{

	struct dp83td510_priv *priv = phydev->priv;



	stats->tx_packets = priv->stats.tx_pkt_cnt;

	stats->tx_errors = priv->stats.tx_err_pkt_cnt;

	stats->rx_packets = priv->stats.rx_pkt_cnt;

	stats->rx_errors = priv->stats.rx_err_pkt_cnt;

}



static int dp83td510_config_intr(struct phy_device *phydev)

{

	int ret;
@@ -599,6 +709,8 @@ static struct phy_driver dp83td510_driver[] = { 
	.get_sqi_max	= dp83td510_get_sqi_max,

	.cable_test_start = dp83td510_cable_test_start,

	.cable_test_get_status = dp83td510_cable_test_get_status,

	.get_phy_stats	= dp83td510_get_phy_stats,

	.update_stats	= dp83td510_update_stats,



	.suspend	= genphy_suspend,

	.resume		= genphy_resume,