Commit 23c3373a authored by Chukun Pan's avatar Chukun Pan Committed by Vinod Koul
Browse files

phy: rockchip: naneng-combphy: use existing DT property check for rk3528 



The naneng-combphy driver already has DT property checks for
"rockchip,enable-ssc" and "rockchip,ext-refclk", use it for
the rk3528_combphy_cfg. Also aligned the indentation of the
rk3528_combphy_grfcfgs parameters (using tabs).

Signed-off-by: default avatarChukun Pan <amadeus@jmu.edu.cn>
Reviewed-by: default avatarYao Zi <ziyao@disroot.org>
Reviewed-by: default avatarHeiko Stuebner <heiko@sntech.de>
Link: https://patch.msgid.link/20250910122000.951100-1-amadeus@jmu.edu.cn


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent d10736db

drivers/phy/rockchip/phy-rockchip-naneng-combphy.c

+5 −7
Original line number Diff line number Diff line
@@ -529,7 +529,7 @@ static int rk3528_combphy_cfg(struct rockchip_combphy_priv *priv) 
		return -EINVAL;

	}



	if (device_property_read_bool(priv->dev, "rockchip,ext-refclk")) {

	if (priv->ext_refclk) {

		rockchip_combphy_param_write(priv->phy_grf, &cfg->pipe_clk_ext, true);



		if (priv->type == PHY_TYPE_PCIE && rate == REF_CLOCK_100MHz) {
@@ -554,11 +554,9 @@ static int rk3528_combphy_cfg(struct rockchip_combphy_priv *priv) 
		}

	}



	if (priv->type == PHY_TYPE_PCIE) {

		if (device_property_read_bool(priv->dev, "rockchip,enable-ssc"))

	if (priv->type == PHY_TYPE_PCIE && priv->enable_ssc)

		rockchip_combphy_updatel(priv, RK3528_PHYREG40_SSC_EN,

					 RK3528_PHYREG40_SSC_EN, RK3528_PHYREG40);

	}



	return 0;

}