Commit 245b6f32 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'mmc-v6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc 

Pull MMC updates from Ulf Hansson:
 "MMC core:
   - Drop the use of BLK_BOUNCE_HIGH
   - Fix partition switch for GP3
   - Remove usage of the deprecated ida_simple API

  MMC host:
   - cqhci: Update bouncing email-addresses in MAINTAINERS
   - davinci_mmc: Use sg_miter for PIO
   - dw_mmc-hi3798cv200: Convert the DT bindings to YAML
   - dw_mmc-hi3798mv200: Add driver for the new dw_mmc variant
   - fsl-imx-esdhc: A couple of corrections/updates to the DT bindings
   - meson-mx-sdhc: Drop use of the ->card_hw_reset() callback
   - moxart-mmc: Use sg_miter for PIO
   - moxart-mmc: Fix accounting for DMA transfers
   - mvsdio: Use sg_miter for PIO
   - mxcmmc: Use sg_miter for PIO
   - omap: Use sg_miter for PIO
   - renesas,sdhi: Add support for R-Car V4M variant
   - sdhci-esdhc-mcf: Use sg_miter for swapping
   - sdhci-of-dwcmshc: Add support for Sophgo CV1800B and SG2002 variants
   - sh_mmcif: Use sg_miter for PIO
   - tmio: Avoid concurrent runs of mmc_request_done()"

* tag 'mmc-v6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (44 commits)
  mmc: core: make mmc_host_class constant
  mmc: core: Fix switch on gp3 partition
  mmc: tmio: comment the ERR_PTR usage in this driver
  mmc: mmc_spi: Don't mention DMA direction
  mmc: dw_mmc: Remove unused of_gpio.h
  mmc: dw_mmc: add support for hi3798mv200
  dt-bindings: mmc: hisilicon,hi3798cv200-dw-mshc: add Hi3798MV200 binding
  dt-bindings: mmc: dw-mshc-hi3798cv200: convert to YAML
  mmc: dw_mmc-hi3798cv200: remove MODULE_ALIAS()
  mmc: core: Use a struct device* as in-param to mmc_of_parse_clk_phase()
  mmc: wmt-sdmmc: remove an incorrect release_mem_region() call in the .remove function
  mmc: tmio: avoid concurrent runs of mmc_request_done()
  dt-bindings: mmc: fsl-imx-mmc: Document the required clocks
  mmc: sh_mmcif: Advance sg_miter before reading blocks
  mmc: sh_mmcif: sg_miter must not be atomic
  mmc: sdhci-esdhc-mcf: Flag the sg_miter as atomic
  dt-bindings: mmc: fsl-imx-esdhc: add default and 100mhz state
  mmc: core: constify the struct device_type usage
  mmc: sdhci-of-dwcmshc: Add support for Sophgo CV1800B and SG2002
  dt-bindings: mmc: sdhci-of-dwcmhsc: Add Sophgo CV1800B and SG2002 support
  ...
parents aeb15291 faf3b801

Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml

+10 −1
Original line number Diff line number Diff line
@@ -55,8 +55,9 @@ properties: 
          - enum:

              - fsl,imx8mn-usdhc

              - fsl,imx8mp-usdhc

              - fsl,imx93-usdhc

              - fsl,imx8ulp-usdhc

              - fsl,imx93-usdhc

              - fsl,imx95-usdhc

          - const: fsl,imx8mm-usdhc

      - items:

          - enum:
@@ -162,6 +163,9 @@ properties: 
      - const: ahb

      - const: per



  iommus:

    maxItems: 1



  power-domains:

    maxItems: 1
@@ -173,6 +177,11 @@ properties: 
          - const: state_100mhz

          - const: state_200mhz

          - const: sleep

      - minItems: 2

        items:

          - const: default

          - const: state_100mhz

          - const: sleep

      - minItems: 1

        items:

          - const: default

Documentation/devicetree/bindings/mmc/fsl-imx-mmc.yaml

+12 −0
Original line number Diff line number Diff line
@@ -24,6 +24,14 @@ properties: 
  reg:

    maxItems: 1



  clocks:

    maxItems: 2



  clock-names:

    items:

      - const: ipg

      - const: per



  interrupts:

    maxItems: 1
@@ -34,6 +42,8 @@ properties: 
    const: rx-tx



required:

  - clocks

  - clock-names

  - compatible

  - reg

  - interrupts
@@ -46,6 +56,8 @@ examples: 
        compatible = "fsl,imx27-mmc", "fsl,imx21-mmc";

        reg = <0x10014000 0x1000>;

        interrupts = <11>;

        clocks = <&clks 29>, <&clks 60>;

        clock-names = "ipg", "per";

        dmas = <&dma 7>;

        dma-names = "rx-tx";

        bus-width = <4>;

Documentation/devicetree/bindings/mmc/hi3798cv200-dw-mshc.txt

deleted100644 → 0
+0 −40
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* Hisilicon Hi3798CV200 specific extensions to the Synopsys Designware Mobile

  Storage Host Controller



Read synopsys-dw-mshc.txt for more details



The Synopsys designware mobile storage host controller is used to interface

a SoC with storage medium such as eMMC or SD/MMC cards. This file documents

differences between the core Synopsys dw mshc controller properties described

by synopsys-dw-mshc.txt and the properties used by the Hisilicon Hi3798CV200

specific extensions to the Synopsys Designware Mobile Storage Host Controller.



Required Properties:

- compatible: Should contain "hisilicon,hi3798cv200-dw-mshc".

- clocks: A list of phandle + clock-specifier pairs for the clocks listed

  in clock-names.

- clock-names: Should contain the following:

	"ciu" - The ciu clock described in synopsys-dw-mshc.txt.

	"biu" - The biu clock described in synopsys-dw-mshc.txt.

	"ciu-sample" - Hi3798CV200 extended phase clock for ciu sampling.

	"ciu-drive"  - Hi3798CV200 extended phase clock for ciu driving.



Example:



	emmc: mmc@9830000 {

		compatible = "hisilicon,hi3798cv200-dw-mshc";

		reg = <0x9830000 0x10000>;

		interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&crg HISTB_MMC_CIU_CLK>,

			 <&crg HISTB_MMC_BIU_CLK>,

			 <&crg HISTB_MMC_SAMPLE_CLK>,

			 <&crg HISTB_MMC_DRV_CLK>;

		clock-names = "ciu", "biu", "ciu-sample", "ciu-drive";

		fifo-depth = <256>;

		clock-frequency = <200000000>;

		cap-mmc-highspeed;

		mmc-ddr-1_8v;

		mmc-hs200-1_8v;

		non-removable;

		bus-width = <8>;

	};

Documentation/devicetree/bindings/mmc/hisilicon,hi3798cv200-dw-mshc.yaml

0 → 100644
+97 −0
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/mmc/hisilicon,hi3798cv200-dw-mshc.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Hisilicon HiSTB SoCs specific extensions to the Synopsys DWMMC controller



maintainers:

  - Yang Xiwen <forbidden405@outlook.com>



properties:

  compatible:

    enum:

      - hisilicon,hi3798cv200-dw-mshc

      - hisilicon,hi3798mv200-dw-mshc



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  clocks:

    items:

      - description: bus interface unit clock

      - description: card interface unit clock

      - description: card input sample phase clock

      - description: controller output drive phase clock



  clock-names:

    items:

      - const: ciu

      - const: biu

      - const: ciu-sample

      - const: ciu-drive



  hisilicon,sap-dll-reg:

    $ref: /schemas/types.yaml#/definitions/phandle-array

    description: |

      DWMMC core on Hi3798MV2x SoCs has a delay-locked-loop(DLL) attached to card data input path.

      It is integrated into CRG core on the SoC and has to be controlled during tuning.

    items:

      - description: A phandle pointed to the CRG syscon node

      - description: Sample DLL register offset in CRG address space



required:

  - compatible

  - reg

  - interrupts

  - clocks

  - clock-names



allOf:

  - $ref: synopsys-dw-mshc-common.yaml#



  - if:

      properties:

        compatible:

          contains:

            const: hisilicon,hi3798mv200-dw-mshc

    then:

      required:

        - hisilicon,sap-dll-reg

    else:

      properties:

        hisilicon,sap-dll-reg: false



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/clock/histb-clock.h>

    #include <dt-bindings/interrupt-controller/arm-gic.h>



    mmc@9830000 {

        compatible = "hisilicon,hi3798cv200-dw-mshc";

        reg = <0x9830000 0x10000>;

        interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;

        clocks = <&crg HISTB_MMC_CIU_CLK>,

                 <&crg HISTB_MMC_BIU_CLK>,

                 <&crg HISTB_MMC_SAMPLE_CLK>,

                 <&crg HISTB_MMC_DRV_CLK>;

        clock-names = "ciu", "biu", "ciu-sample", "ciu-drive";

        resets = <&crg 0xa0 4>;

        reset-names = "reset";

        pinctrl-names = "default";

        pinctrl-0 = <&emmc_pins_1 &emmc_pins_2

                     &emmc_pins_3 &emmc_pins_4>;

        fifo-depth = <256>;

        clock-frequency = <200000000>;

        cap-mmc-highspeed;

        mmc-ddr-1_8v;

        mmc-hs200-1_8v;

        non-removable;

        bus-width = <8>;

    };

Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml

+1 −0
Original line number Diff line number Diff line
@@ -67,6 +67,7 @@ properties: 
              - renesas,sdhi-r8a779a0  # R-Car V3U

              - renesas,sdhi-r8a779f0  # R-Car S4-8

              - renesas,sdhi-r8a779g0  # R-Car V4H

              - renesas,sdhi-r8a779h0  # R-Car V4M

          - const: renesas,rcar-gen4-sdhi # R-Car Gen4



  reg: