Commit 249cfa31 authored by Jakub Kicinski's avatar Jakub Kicinski
Browse files

Revert "Merge branch 'there-are-some-bugfix-for-the-hns3-ethernet-driver'" 

This reverts commit d80a3091, reversing
changes made to 637f4147:

2cf24614 ("net: hns3: fix kernel crash when 1588 is sent on HIP08 devices")
3e22b7de ("net: hns3: fixed hclge_fetch_pf_reg accesses bar space out of bounds issue")
d1c2e296 ("net: hns3: initialize reset_timer before hclgevf_misc_irq_init()")
5f62009f ("net: hns3: don't auto enable misc vector")
2758f18a ("net: hns3: Resolved the issue that the debugfs query result is inconsistent.")
662ecfc4 ("net: hns3: fix missing features due to dev->features configuration too early")
3e0f7cc8 ("net: hns3: fixed reset failure issues caused by the incorrect reset type")
f2c14899 ("net: hns3: add sync command to sync io-pgtable")
e6ab1944 ("net: hns3: default enable tx bounce buffer when smmu enabled")

The series is making the driver poke into IOMMU internals instead of
implementing appropriate IOMMU workarounds.

Link: https://lore.kernel.org/069c9838-b781-4012-934a-d2626fa78212@arm.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 08d05cea

drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c

+1 −3
Original line number Diff line number Diff line
@@ -1293,10 +1293,8 @@ static ssize_t hns3_dbg_read(struct file *filp, char __user *buffer, 


		/* save the buffer addr until the last read operation */

		*save_buf = read_buf;

	}



		/* get data ready for the first time to read */

	if (!*ppos) {

		ret = hns3_dbg_read_cmd(dbg_data, hns3_dbg_cmd[index].cmd,

					read_buf, hns3_dbg_cmd[index].buf_len);

		if (ret)

drivers/net/ethernet/hisilicon/hns3/hns3_enet.c

+1 −58
Original line number Diff line number Diff line
@@ -11,7 +11,6 @@ 
#include <linux/irq.h>

#include <linux/ip.h>

#include <linux/ipv6.h>

#include <linux/iommu.h>

#include <linux/module.h>

#include <linux/pci.h>

#include <linux/skbuff.h>
@@ -381,24 +380,6 @@ static const struct hns3_rx_ptype hns3_rx_ptype_tbl[] = { 
#define HNS3_INVALID_PTYPE \

		ARRAY_SIZE(hns3_rx_ptype_tbl)



static void hns3_dma_map_sync(struct device *dev, unsigned long iova)

{

	struct iommu_domain *domain = iommu_get_domain_for_dev(dev);

	struct iommu_iotlb_gather iotlb_gather;

	size_t granule;



	if (!domain || !iommu_is_dma_domain(domain))

		return;



	granule = 1 << __ffs(domain->pgsize_bitmap);

	iova = ALIGN_DOWN(iova, granule);

	iotlb_gather.start = iova;

	iotlb_gather.end = iova + granule - 1;

	iotlb_gather.pgsize = granule;



	iommu_iotlb_sync(domain, &iotlb_gather);

}



static irqreturn_t hns3_irq_handle(int irq, void *vector)

{

	struct hns3_enet_tqp_vector *tqp_vector = vector;
@@ -1051,8 +1032,6 @@ static bool hns3_can_use_tx_sgl(struct hns3_enet_ring *ring, 
static void hns3_init_tx_spare_buffer(struct hns3_enet_ring *ring)

{

	u32 alloc_size = ring->tqp->handle->kinfo.tx_spare_buf_size;

	struct net_device *netdev = ring_to_netdev(ring);

	struct hns3_nic_priv *priv = netdev_priv(netdev);

	struct hns3_tx_spare *tx_spare;

	struct page *page;

	dma_addr_t dma;
@@ -1094,7 +1073,6 @@ static void hns3_init_tx_spare_buffer(struct hns3_enet_ring *ring) 
	tx_spare->buf = page_address(page);

	tx_spare->len = PAGE_SIZE << order;

	ring->tx_spare = tx_spare;

	ring->tx_copybreak = priv->tx_copybreak;

	return;



dma_mapping_error:
@@ -1746,9 +1724,7 @@ static int hns3_map_and_fill_desc(struct hns3_enet_ring *ring, void *priv, 
				  unsigned int type)

{

	struct hns3_desc_cb *desc_cb = &ring->desc_cb[ring->next_to_use];

	struct hnae3_handle *handle = ring->tqp->handle;

	struct device *dev = ring_to_dev(ring);

	struct hnae3_ae_dev *ae_dev;

	unsigned int size;

	dma_addr_t dma;
@@ -1780,13 +1756,6 @@ static int hns3_map_and_fill_desc(struct hns3_enet_ring *ring, void *priv, 
		return -ENOMEM;

	}



	/* Add a SYNC command to sync io-pgtale to avoid errors in pgtable

	 * prefetch

	 */

	ae_dev = hns3_get_ae_dev(handle);

	if (ae_dev->dev_version >= HNAE3_DEVICE_VERSION_V3)

		hns3_dma_map_sync(dev, dma);



	desc_cb->priv = priv;

	desc_cb->length = size;

	desc_cb->dma = dma;
@@ -2483,6 +2452,7 @@ static int hns3_nic_set_features(struct net_device *netdev, 
			return ret;

	}



	netdev->features = features;

	return 0;

}
@@ -4898,30 +4868,6 @@ static void hns3_nic_dealloc_vector_data(struct hns3_nic_priv *priv) 
	devm_kfree(&pdev->dev, priv->tqp_vector);

}



static void hns3_update_tx_spare_buf_config(struct hns3_nic_priv *priv)

{

#define HNS3_MIN_SPARE_BUF_SIZE (2 * 1024 * 1024)

#define HNS3_MAX_PACKET_SIZE (64 * 1024)



	struct iommu_domain *domain = iommu_get_domain_for_dev(priv->dev);

	struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(priv->ae_handle);

	struct hnae3_handle *handle = priv->ae_handle;



	if (ae_dev->dev_version < HNAE3_DEVICE_VERSION_V3)

		return;



	if (!(domain && iommu_is_dma_domain(domain)))

		return;



	priv->min_tx_copybreak = HNS3_MAX_PACKET_SIZE;

	priv->min_tx_spare_buf_size = HNS3_MIN_SPARE_BUF_SIZE;



	if (priv->tx_copybreak < priv->min_tx_copybreak)

		priv->tx_copybreak = priv->min_tx_copybreak;

	if (handle->kinfo.tx_spare_buf_size < priv->min_tx_spare_buf_size)

		handle->kinfo.tx_spare_buf_size = priv->min_tx_spare_buf_size;

}



static void hns3_ring_get_cfg(struct hnae3_queue *q, struct hns3_nic_priv *priv,

			      unsigned int ring_type)

{
@@ -5155,7 +5101,6 @@ int hns3_init_all_ring(struct hns3_nic_priv *priv) 
	int i, j;

	int ret;



	hns3_update_tx_spare_buf_config(priv);

	for (i = 0; i < ring_num; i++) {

		ret = hns3_alloc_ring_memory(&priv->ring[i]);

		if (ret) {
@@ -5360,8 +5305,6 @@ static int hns3_client_init(struct hnae3_handle *handle) 
	priv->ae_handle = handle;

	priv->tx_timeout_count = 0;

	priv->max_non_tso_bd_num = ae_dev->dev_specs.max_non_tso_bd_num;

	priv->min_tx_copybreak = 0;

	priv->min_tx_spare_buf_size = 0;

	set_bit(HNS3_NIC_STATE_DOWN, &priv->state);



	handle->msg_enable = netif_msg_init(debug, DEFAULT_MSG_LEVEL);

drivers/net/ethernet/hisilicon/hns3/hns3_enet.h

+0 −2
Original line number Diff line number Diff line
@@ -596,8 +596,6 @@ struct hns3_nic_priv { 
	struct hns3_enet_coalesce rx_coal;

	u32 tx_copybreak;

	u32 rx_copybreak;

	u32 min_tx_copybreak;

	u32 min_tx_spare_buf_size;

};



union l3_hdr_info {

drivers/net/ethernet/hisilicon/hns3/hns3_ethtool.c

+0 −33
Original line number Diff line number Diff line
@@ -1933,31 +1933,6 @@ static int hns3_set_tx_spare_buf_size(struct net_device *netdev, 
	return ret;

}



static int hns3_check_tx_copybreak(struct net_device *netdev, u32 copybreak)

{

	struct hns3_nic_priv *priv = netdev_priv(netdev);



	if (copybreak < priv->min_tx_copybreak) {

		netdev_err(netdev, "tx copybreak %u should be no less than %u!\n",

			   copybreak, priv->min_tx_copybreak);

		return -EINVAL;

	}

	return 0;

}



static int hns3_check_tx_spare_buf_size(struct net_device *netdev, u32 buf_size)

{

	struct hns3_nic_priv *priv = netdev_priv(netdev);



	if (buf_size < priv->min_tx_spare_buf_size) {

		netdev_err(netdev,

			   "tx spare buf size %u should be no less than %u!\n",

			   buf_size, priv->min_tx_spare_buf_size);

		return -EINVAL;

	}

	return 0;

}



static int hns3_set_tunable(struct net_device *netdev,

			    const struct ethtool_tunable *tuna,

			    const void *data)
@@ -1974,10 +1949,6 @@ static int hns3_set_tunable(struct net_device *netdev, 


	switch (tuna->id) {

	case ETHTOOL_TX_COPYBREAK:

		ret = hns3_check_tx_copybreak(netdev, *(u32 *)data);

		if (ret)

			return ret;



		priv->tx_copybreak = *(u32 *)data;



		for (i = 0; i < h->kinfo.num_tqps; i++)
@@ -1992,10 +1963,6 @@ static int hns3_set_tunable(struct net_device *netdev, 


		break;

	case ETHTOOL_TX_COPYBREAK_BUF_SIZE:

		ret = hns3_check_tx_spare_buf_size(netdev, *(u32 *)data);

		if (ret)

			return ret;



		old_tx_spare_buf_size = h->kinfo.tx_spare_buf_size;

		new_tx_spare_buf_size = *(u32 *)data;

		netdev_info(netdev, "request to set tx spare buf size from %u to %u\n",

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c

+9 −36
Original line number Diff line number Diff line
@@ -6,7 +6,6 @@ 
#include <linux/etherdevice.h>

#include <linux/init.h>

#include <linux/interrupt.h>

#include <linux/irq.h>

#include <linux/kernel.h>

#include <linux/module.h>

#include <linux/netdevice.h>
@@ -3585,17 +3584,6 @@ static int hclge_set_vf_link_state(struct hnae3_handle *handle, int vf, 
	return ret;

}



static void hclge_set_reset_pending(struct hclge_dev *hdev,

				    enum hnae3_reset_type reset_type)

{

	/* When an incorrect reset type is executed, the get_reset_level

	 * function generates the HNAE3_NONE_RESET flag. As a result, this

	 * type do not need to pending.

	 */

	if (reset_type != HNAE3_NONE_RESET)

		set_bit(reset_type, &hdev->reset_pending);

}



static u32 hclge_check_event_cause(struct hclge_dev *hdev, u32 *clearval)

{

	u32 cmdq_src_reg, msix_src_reg, hw_err_src_reg;
@@ -3616,7 +3604,7 @@ static u32 hclge_check_event_cause(struct hclge_dev *hdev, u32 *clearval) 
	 */

	if (BIT(HCLGE_VECTOR0_IMPRESET_INT_B) & msix_src_reg) {

		dev_info(&hdev->pdev->dev, "IMP reset interrupt\n");

		hclge_set_reset_pending(hdev, HNAE3_IMP_RESET);

		set_bit(HNAE3_IMP_RESET, &hdev->reset_pending);

		set_bit(HCLGE_COMM_STATE_CMD_DISABLE, &hdev->hw.hw.comm_state);

		*clearval = BIT(HCLGE_VECTOR0_IMPRESET_INT_B);

		hdev->rst_stats.imp_rst_cnt++;
@@ -3626,7 +3614,7 @@ static u32 hclge_check_event_cause(struct hclge_dev *hdev, u32 *clearval) 
	if (BIT(HCLGE_VECTOR0_GLOBALRESET_INT_B) & msix_src_reg) {

		dev_info(&hdev->pdev->dev, "global reset interrupt\n");

		set_bit(HCLGE_COMM_STATE_CMD_DISABLE, &hdev->hw.hw.comm_state);

		hclge_set_reset_pending(hdev, HNAE3_GLOBAL_RESET);

		set_bit(HNAE3_GLOBAL_RESET, &hdev->reset_pending);

		*clearval = BIT(HCLGE_VECTOR0_GLOBALRESET_INT_B);

		hdev->rst_stats.global_rst_cnt++;

		return HCLGE_VECTOR0_EVENT_RST;
@@ -3781,7 +3769,7 @@ static int hclge_misc_irq_init(struct hclge_dev *hdev) 
	snprintf(hdev->misc_vector.name, HNAE3_INT_NAME_LEN, "%s-misc-%s",

		 HCLGE_NAME, pci_name(hdev->pdev));

	ret = request_irq(hdev->misc_vector.vector_irq, hclge_misc_irq_handle,

			  IRQ_NOAUTOEN, hdev->misc_vector.name, hdev);

			  0, hdev->misc_vector.name, hdev);

	if (ret) {

		hclge_free_vector(hdev, 0);

		dev_err(&hdev->pdev->dev, "request misc irq(%d) fail\n",
@@ -4074,7 +4062,7 @@ static void hclge_do_reset(struct hclge_dev *hdev) 
	case HNAE3_FUNC_RESET:

		dev_info(&pdev->dev, "PF reset requested\n");

		/* schedule again to check later */

		hclge_set_reset_pending(hdev, HNAE3_FUNC_RESET);

		set_bit(HNAE3_FUNC_RESET, &hdev->reset_pending);

		hclge_reset_task_schedule(hdev);

		break;

	default:
@@ -4108,8 +4096,6 @@ static enum hnae3_reset_type hclge_get_reset_level(struct hnae3_ae_dev *ae_dev, 
		clear_bit(HNAE3_FLR_RESET, addr);

	}



	clear_bit(HNAE3_NONE_RESET, addr);



	if (hdev->reset_type != HNAE3_NONE_RESET &&

	    rst_level < hdev->reset_type)

		return HNAE3_NONE_RESET;
@@ -4251,7 +4237,7 @@ static bool hclge_reset_err_handle(struct hclge_dev *hdev) 
		return false;

	} else if (hdev->rst_stats.reset_fail_cnt < MAX_RESET_FAIL_CNT) {

		hdev->rst_stats.reset_fail_cnt++;

		hclge_set_reset_pending(hdev, hdev->reset_type);

		set_bit(hdev->reset_type, &hdev->reset_pending);

		dev_info(&hdev->pdev->dev,

			 "re-schedule reset task(%u)\n",

			 hdev->rst_stats.reset_fail_cnt);
@@ -4494,20 +4480,8 @@ static void hclge_reset_event(struct pci_dev *pdev, struct hnae3_handle *handle) 
static void hclge_set_def_reset_request(struct hnae3_ae_dev *ae_dev,

					enum hnae3_reset_type rst_type)

{

#define HCLGE_SUPPORT_RESET_TYPE \

	(BIT(HNAE3_FLR_RESET) | BIT(HNAE3_FUNC_RESET) | \

	BIT(HNAE3_GLOBAL_RESET) | BIT(HNAE3_IMP_RESET))



	struct hclge_dev *hdev = ae_dev->priv;



	if (!(BIT(rst_type) & HCLGE_SUPPORT_RESET_TYPE)) {

		/* To prevent reset triggered by hclge_reset_event */

		set_bit(HNAE3_NONE_RESET, &hdev->default_reset_request);

		dev_warn(&hdev->pdev->dev, "unsupported reset type %d\n",

			 rst_type);

		return;

	}



	set_bit(rst_type, &hdev->default_reset_request);

}
@@ -11917,6 +11891,9 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev) 


	hclge_init_rxd_adv_layout(hdev);



	/* Enable MISC vector(vector0) */

	hclge_enable_vector(&hdev->misc_vector, true);



	ret = hclge_init_wol(hdev);

	if (ret)

		dev_warn(&pdev->dev,
@@ -11929,10 +11906,6 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev) 
	hclge_state_init(hdev);

	hdev->last_reset_time = jiffies;



	/* Enable MISC vector(vector0) */

	enable_irq(hdev->misc_vector.vector_irq);

	hclge_enable_vector(&hdev->misc_vector, true);



	dev_info(&hdev->pdev->dev, "%s driver initialization finished.\n",

		 HCLGE_DRIVER_NAME);
@@ -12338,7 +12311,7 @@ static void hclge_uninit_ae_dev(struct hnae3_ae_dev *ae_dev) 


	/* Disable MISC vector(vector0) */

	hclge_enable_vector(&hdev->misc_vector, false);

	disable_irq(hdev->misc_vector.vector_irq);

	synchronize_irq(hdev->misc_vector.vector_irq);



	/* Disable all hw interrupts */

	hclge_config_mac_tnl_int(hdev, false);